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Design And Implementation Of Low SNR Communication System Baseband In TDD Mode

Posted on:2016-11-30Degree:MasterType:Thesis
Country:ChinaCandidate:F YangFull Text:PDF
GTID:2308330473457133Subject:Electronic and communication engineering
Abstract/Summary:PDF Full Text Request
In the communication transmission of antennas with microwave and millimeter wave, the main lobe of the antennas will become quite narrow, which makes it extremely difficult to the antennas’ automatic alignment when the frequency of transmitted carrier is high(such as 60 GHz). In order to improve the probability of antennas’ automatic alignment and make the antennas the realizations of communication on the first side lobe, it is necessary to design a wireless communication system which is able to work properly in an extremely low SNR environment. The main communication conditions exists large offset, low SNR and short-cycle in TDD mode. For these problems, this paper designs and implements a wireless communication system in TDD mode which can be applied to the current environment. This system mainly includes a TDD slot synchronization module, a frequency offset estimation module and a PN code correlation module.This paper introduces the research background and significance of the project, and it summarizes the research status about TDD slot synchronization, frequency offset estimate and low SNR communications technologies. Secondly, this paper analyzes the indicators of the project such as the value of the SNR, bit error rate and frequency offset range. It also discusses the feasibility of the current existing algorithms and proposes the overall technical solution of system based on the above analysis. Thirdly, based on the characteristics of the tone signal in frequency domain and the PN code correlation, and combined with the analysis of the subject, modeling and simulating the low SNR communication system on MATLAB/Simulink platform, and gets a simulation scheme that can be achieved. Finally, on the basis of simulation, this paper implements the low SNR communication system by Verilog HDL logic code, and completes the final test work.In the design of simulation, using Simulink can achieve the system modular simulation work. Simulation mainly analyzes the research of PN sequence correlation algorithm performance under different SNR conditions and frequency offset environment. Considering factors such as processing time and resources, this paper ultimately choses 7bit PN sequences to complete the frequency domain correlation.In the realization of the system, the low SNR communication system consists of a control signal generation module, a TDD synchronization module and a transmitter and a receiver module. This paper introduces the realization of the synchronization module, frequency estimation module and PN sequence module in detail. Finally, this paper tests the performance of the system on FPGA development board after functional simulation, synthesis and other steps. The result of the test shows that the system meets the requests of the project indicators.This paper designs and implements a low SNR communication system. Its code rate can achieve 2.5kbps and the error rate is lower than 10-3 in a condition of a period of 4ms in TDD mode, frequency offset range up to ± 1MHz, and under-30 dB SNR.
Keywords/Search Tags:low SNR, frequency offset estimation, TDD synchronization, PN code correlation
PDF Full Text Request
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