| System-on-chip(System on Chip, abbreviated as So C) has become a trend as systems become more and more complex, it’s unrealistic that complete the system design entirely from the pipe every time, so IP core reuse design has become an necessity. And the SRAM(Static Random Access Memory, abbreviated as SRAM) that plays an important role in the system area and power, if still uses the full custom design approach, obviously can’t meet the needs of the system design, so with SRAM compiler technology appears. It’s an EDA tool that can dynamically generate SRAM IP core.The appear of the SRAM compiler technology that does make it easier, simpler and save labor costs and shorten the design cycle, but there are also some other problems with the use of the SRAM compiler. The first is a different way of the execution of SRAM compiler, it will also waste a lot of time and manpower when full manual to achiveve the execution; Secondly, the built-in self test(BIST) circuit demand; And the last is the same type of SRAM provided by different vendors, have differences on port and behavior, inconvenient to use.This thesis firstly studies and analyzes all the execution of SRAM compiler, and the BIST test circuit, then develop an automic generation of software with the Python Lauguage. The software can realize the following functions:1. All the execution of SRAM compiler automatically implemented by software tool;2. A SRAM Wrapper is automatically added for the differences on port and behavior of the same type of SRAM, pack into a unified interface;3. Built-in self test circuit can be automatically generated and tested.For the SRAM Wrapper that generated by automatic generation tool, has built a complete VMM verification environment to ensure the correctness of it, so as to provide the reliability for users.Upon completion of this thesis, the automatic generation tool will be applied to project immediately. Compared with full manual implementation, it will save a lot of manpower and time, and reduce the chance of human error in the operation. |
