| SerDes is a high speed conversion interface chip of serial and parallel, it has been widely used in the field of communications, such as RapidIO interface, InfiniBand and PCIE interface. In the field of sending, a group of parallel data is turned into high speed serial signal by SerDes. In the field of receiving, high speed serial signal is converted to a group of parallel data once again.This paper introduces codec circuit and transceiver circuit of the SerDes chip, codec circuit is a digital circuit, which compeleted by FPGA. Encoding is compeleted by patent about 8b/10 b of IBM, codec part composed by two 8b/10 b encoding and decoding module, and controlled by two clocks, and then launch the results of the 8b/10 b codec module through the ping-pong operation. This paper introduces the partition and design process of codec circuit, and simulation it by Isim software.Transceiver circuit is used to send and receive low voltage difference signal, this paper compares the four high-speeded difference interfaces, it’s the LVPECL difference interface, LVDS difference, CML difference and VML difference interface. This paper uses the VML difference interface for its lower power consumption, easy to integrate, simple structure and low cost.The sending circuit includes pre-emphasis circuit, conversion circuit of serial and parallel, driver circuit. Conversion circuit of serial and parallel links encoding circuit and sending circuit, and converts parallel signals into serial of CMOS level signal. Driving circuit is the main part of sending circuit, it adoptes the offset of the differential amplifier technology, effectively simplifys the circuit, and saves the area of layout. sending circuit adds a pre-emphasis circuit to enhance the strength of difference signal, to avoid the function error caused by attenuation of high frequency signal.The receiving circuit includes conversion circuit of serial and parallel, the impedance matching circuit and signal detection circuit. Impedance matching circuit adops resistor of chip, it saves the area of layout and improves the matching efficiency. Conversion circuit of serial and parallel links receiving circuit and decoding circuit, and converts the serial CMOS level signal into parallel signal. To avoid the unreadable code of decoding circuit for serious attenuation of difference signal in the channel, this paper designes the signal detection circuit to detect voltage of difference signal. The decoding circuit will stop working if the difference signal does not meet the requirements.Encoding and decoding circuit and the transceiver circuit complete layout by Astro and full custom, they use TSMC 0.13 um CMOS technology. |