Design And Implementation Of Instruction Pipeline And Hardware/Software Co-verification

X-DSP processor is a high-performance 64-bit floating-point vector multi-cores DSP designed by the Institude of Microelectronics, National University of Defense Technology independently. Under 40 nm technology, the frequency can achieve 1GHz by adopting the VLIW architecture with a 40-bit/80-bit variable-length RISC instruction set and a 32-bit/64-bit fixed-point/ floating-point operation. A maximum of eleven instructions can be issued in every clock cycle.Based on the research work of X-DSP processor, this dissertation analyzes the pipeline technology firstly, and then realizes the instruction dispatch unit and pipeline control unit which have been verified by using the proposed HW/SW co-verification. The main innovations and contributions are listed as follows:1) After analyzing the architecture, the instruction format and the pipeline of the X-DSP processor, this dissertation proposes the design principles of the instruction dispatch unit and pipeline control unit in the instruction pipeline components;2) Under the VLIW structure, the instruction dispatch unit is designed, which allows dispatching the instruction across the border of the instruction package, and supports L1 P bypass and emulation/test from ET;3) Based on the analysis of the characteristics of the X-DSP’s branch slot and the support of simulation, instruction control unit has been proposed to control the instruction stream;4) According to the logic design of instruction dispatch unit and pipeline control unit, this dissertation verifies these functions,and executes the coverage analysis and logic synthesis;5) To overcome the disadvantages of conventional FPFA prototype, a new PLI-based debugging and verification technology is proposed, which utilizes PLI interface to accomplish nested invoking between C and Verilog codes and adopts data-sharing mechanism to accomplish the communication between different processes. Based on HW/SW co-design, the instruction pipeline of the X-DSP is verified. The results show that this principle can realize debugging and the function are fully verified during the design process.