Design And Implementation Of A Radiation-hardened SRAM Based On 65 Nm Bulk CMOS Process

With the Development of space technology, new requirements are put forward to high performance integrated circuit chip: Radiation-Hardened design. to achieve working stable in complex space radiation environments. Static Random Access Memory(SRAM) is an important data access components in the Radiation-Hardened integrated circuit chip, which is mainly constitute by the memory cell array and peripheral circuit, because of the sensitivity itself and occupy a larger area in the chip layout, it is vulnerable to the impact of space radiation effects, especially for Single-Event Effects(SEE), such as the SEL, SEU and SET effects. These types of soft errors caused by Single Event Effects in SRAMs will cause the space electronic systems working abnormal. Furthermore, the SEL may even cause completely damage to the entire system.Based on an anti-radiation chip’s requirement and in-depth study about the Single Event Effects, this paper implemented an Radiation-Hardened SRAM by full-custom design with a capacity of 512x32 bits, which is stable enough to Single Event Effects. The work has completed in the design and implementation is as the following list achieved good results:Firstly, summarized the influence of the space radiation effects on the electronic systems, and discussed the significance of the Radiation-Hardened design of SRAM in the anti-radiation chips. According the research, generalized that the SEL、SEU and SET seriously impact on SRAM.Secondly, made an in-depth research on the general circuit structure and basic principle of the SRAM, analyzed the advantages and disadvantages of conventional memory cell and choose the DICE(Dual Interlocked Storage Cell)structure as the basic memory cell. Made a set of rules for Radiation-Hardened design during the layout design of the SRAM, it will improve the performance to resistance the radiation. This paper proposed a new layout structure for DICE: the Vertical Layout. In the Vertical Layout, the distance between adjacent sensitive nodes is increased to large enough to avoid the Single Event Upset.Finally the circuit design and layout design of the SRAM is implemented by full custom way. To make the Radiation-Hardened SRAM into a hardcore which is be used in the anti-radiation chips, it is necessary to extract the parasitic parameters of the territory, and establish the physical library and timing library for the SRAM. An algorithm named March C+ is used to verify the entire function of the SRAM.