Research And Application Of Multi-core DSP In The Baseband Processing Board

The paper is based on a communication company C-RAN macro base-station project that aims to centralized high-performance baseband processing,reduce the number of basestations in the same area, increase the user’s bandwidth, improve user baseband data transmission speed and ability, while also reducing energy consumption to achieve green evolution.The main issue in the application responsible for the design of multi-core DSP system. The paper analysises system application requirements, accesses to a large number of multi-core DSP on the basis of the relevant information, selects Ti TMS320C6670 multi-core DSP as a baseband processing core processing chip, and designs the power supply circuit, clocking circuit and external storage and a variety of high-speed communication interface circuit.Based on Ti CCS5.3 integrated development environment, using C language programming, I analysis the system and design of multi-core DSP Boot, drivers of high-speed communication interface, and low power design.In the project multicore DSP boot mode and communication interface driver design process is very complex,which is a difficult point of the project, so I focus on the part of the in-depth research and design. Based SYS / BIOS operating system I program multicore DSP subsystem test procedures, and through the JTAG emulation to download to hardware memory and debug, and complete system testing, to achieve a good project requirementsThrough this research project, the author finally to C-RAN baseband pools provide a stable baseband processor boards, multi-standard network, to achieve a smooth upgrade to meet the high-speed, low-latency data transmission, high-performance processing, reduction in power consumption, and successfully appliey to the small base station chassis systems.,and provide a stable platform for the driver physical layer algorithms.