Research On Real-time OCR System For High-speed Moving Cable Based On SoC

In cable manufacturing process, the product information, such as date, patch and type, of cable are always printed on the cable surface in form of dot-matrix characters. The recognition of text on cable is an important part of cable quality control. Traditional artificial character recognition method has been proved to be inefficient and difficult. With the improvement of cable producing speed, artificial recognition method can not meet cable manufacturing enterprises’ requirement any longer. So, in this dissertation a real-time OCR system for high-speed moving cable based on SoC is presented.The dot-matrix character recognition system has been implemented on the Zynq SoC platform. Zynq efficiently combines the flexibility of ARM and strong computation ability of FPGA, and connects them with AXI4 high-speed bus. The accuracy of this system reaches 91%. And it consums only 22 ms to recognize a picture of cable which consists 1600×1200 pixels. To our knowledge, it’s the first report that a dot-matrix character recognition system is implemented on single chip in China.In dot-matrix character recognition algorithm, differential method has been used to get rid of background area. 4 images, including area with text and area without text, were acquired by the image acquisition system each time, so an extraction algorithm has been proposed to find the part containing characters. Algorithm mentioned above used the square error between fitted curve and projection curve. After that, a large window-sized median difference binaryzation method has been proposed and optimized to solve the problem of uneven lighting. For effective segmentation of dot-matrix characters, the twice segmentation algorithm based on multiple projection has been adopted, after that characters were normalized. Next, block centroid vector has been used as feature vector of normalized image. Finally, the multi-layer classifier has been designed to recognize characters.To improve the speed of character recognition algorithm, High Level Synthesis technology was adopted to implement hardware acceleration. Hardware parallelization, memory architecture optimization and loop unrolling technology has been widely used in large window-sized median difference binaryzation algorithm, Otsu method, and block centroid feature vector extraction method. After implementation of hardware circuit, cosimulation technology was used to verify all the modules. Finally, hardware optimized algorithm has been proved 50 times faster.To test performance of system, a complete hardware and software testing platform has been built up, in which embedded Linux OS and Qt libaray was ported and a GUI was implemented. In the end, the complete dot-matrix character recognition system was implemented in single chip of Zynq.