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Hardware Implement Of BM3D

Posted on:2014-12-15Degree:MasterType:Thesis
Country:ChinaCandidate:B LiuFull Text:PDF
GTID:2308330503452566Subject:Electronic Science and Technology
Abstract/Summary:PDF Full Text Request
BM3D, short for Block Matching 3 Dimension is a video denoising algorithm that is based on block matching and 3 dimension filtering. First, BM3 D divides every frame into many blocks whose size is N ×N, N is 8 in our design. It searches N blocks that are most familiar with the current reference block in its neighborhood and composes a group with these blocks. Second, it transforms this group into other domain, and then attenuates the noise by hard-thresholding of the transform coef?cients, and then applies inverse transform and gets the denoised block. Last, it aggregates all the blocks that is generated in second step and gets the denoised frame. BM3 D, which is based on the correlation of time and space, is the state-of-art algorithm of video denoising. Although BM3 D can improve peak signal-to-noise ratio obviously and has very good subjective visual quality, the calculation complexity of this algorithm is so huge that it can’t denoise a video in real-time in the form of software. Accelerating BM3 D with hardware is very significant.The critical designs in our chip assure that it can denoise successfully. For instance, the block size is 8×8, the strategy of 2 diversions discrete cosine transform, the size of buffer of reading and writing DDR in each block, etc. This is the first time of hardware implement of BM3 D to denoise video in real-time. The problem we meet and the solution we offer both have very important practical value and design reference value.Chapter 2 introduces the basic computing step of BM3 D and some measures of improvement and optimization in the consideration of hardware implement. Chapter 3 calculates the required system frequency and band width of each main block in NRU, defines the architecture of the whole chip and introduces the design detail of each block. Chapter 4 introduces all the critical designs in our chip. Chapter 5 shows the simulation result of software and hardware. Chapter 6 provides an outlook of the future of hardware implement of BM3 D.
Keywords/Search Tags:BM3D, hardware implement, band width and speed, DCT, real-time denoising
PDF Full Text Request
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