Design Of 10GigE TCP Hardware Protocol Stack Based On FPGA

With the gradual improvement of the network bandwidth, some new network communication transmission standards have been proposed such as ten-Gigabit-Ethernet. How to improve the transmission speed of the network and reduce the cost of the processor to ensure the correctness of data, has been become a hot spot of high performance data processing area. If TCP/IP protocol stacks are designed by software stack and CPU, the link path, instruction set and the architecture are not specially designed for CPU protocol. Therefore, the ability of CPU to handle high rate network protocols is limited. For example, in ten-Gigabit-Ethernet, if CPU is still used to deal with duties of network protocol, a lot of CPU resources, waste of memory, low utilization rate and power consumption will be taken up.Using FPGA to design a full hardware TCP protocol stack based on the TCP/IP protocol. The design cycle of FPGA design and development is short. It has advantages of debugging convenient as well as the hardware its own bandwidth, processing speed and low information processing delay. In order to transfer the processing and transfer of CPU to the special hardware device, the use efficiency of the whole system is improved, and the burden of CPU is reduced, so that it can be allocated to deal with other tasks in the system. At the same time, the current embedded system in the network transmission bandwidth is small, data processing speed and other restrictions that will be solved and the transmission and utilization efficiency of the network will be improved. Besides, the TCP protocol itself can also effectively guarantee the accuracy and integrity of the data.In this paper, the design of TCP hardware protocol stack and ISE development kit and VHDL are integrated. The function of each module is simulated and board level verification is performed. The protocol stack is tested and verified using capture software in computer spot, the basic design of modules the functional and performance requirements is verified by the test results.