The Design And Implementation Of ZW100 DSP Core

DSP(Digital Signal Processor) is a kind of special microprocessor for digital signal processing. DSP has advantages in dealing with digital signal field of transformation, filtering, compression and so on. With the rapid development of information processing technology, the demand for DSP performance grows higher and higher. The technology of enhancing the instruction level parallel processing ability is an effective means to increase DSP performance. One of the main techniques to enhance instruction level parallel is use of superscalar architecture.ZW100 DSP core is of superscalar architecture which contains two parallel pipelines of Integer-Computing and Load-Store, thus, this DSP supports parallel execution of two instructions per cycle.ZW100 DSP core contains two parallel integer-computing and load-store modules and supports parallel execution of integer-computing and load-store. Integer-computing module contains instruction decode unit, arithmetic logic unit (ALU) and multiply add unit(MAC). Multiply add unit, which contains four 16 bit multiply arithmetic units and two 64 bit ACCs, supports single-instruction-multiple-data-stream(SIMD) instructions and four parallel 16 bit or two 32 bit multiply-add. Load-store module contains load-store decode unit, load-store control unit, address arithmetic logic unit(AALU) and address generation unit. ZW100 DSP supports two kind of instruction coded formats as 16-bit and 32-bit. All instructions support 32-bit coded format, while 16-bit format is a subset of 32-bit format. This kind of encoded mode enhances code density, decreases demand of code space and system requirements, so as to lower down the system power consumption. The frequency of ZW100 DSP Processor is 800 MHz and the operational capability is 2 GMACs.ZW100 DSP Processor is designed for main digital signal processing market. It can be used in application of video and audio multimedia, voice signal processing, high definition image processing and so on. ZW100 DSP is with high computing performance, low power consumption and high code density in signal processing application of high need of computing ability.