Development Of AXIe Instrument Module Interfacing Components

With the rapid development of the automatic test system, AXIe standard as an existing open system architecture more suitable for the future needs of automated testing systems, it also has higher business value and many advantages that beyond comparition with the previous test architectures, especially in the areas of flexibility, high extensibility and modularity.Based on the analyzing of AXIe architecture specification, a detailed needs analysis of AXIe instrument module interfacing components is presented. The AXIe instrument module interfacing components this thesis needs to complete can not only support PCI Express and Ethernet data transsmison, but also support the fuctions that AXIe standard requires, such as timing, synchronization as also as local bus signals.Based on the needs analysis, the hardware overall scheme of AXIe instrument module interfacing components has been put forward. This thesis selects FPGA as the core controller which is used to realize each function of AXIe interface and the expansion of HSMC common interface.In order to achieve the logic between each subsystem and increase the reusability of the logic, Qsys interconnect structure is used in logic designing. This thesis designs PCI Exprss interface subsystem logic, DDR2 memory logic, and also builts a hardware platform of Ethernet interface subsystem. Through the designation of customized IP core to realized the reusability and interchangeability between different logical functions. The software design of Ethernet interface subsystem is mainly include compiling the application and the software function that runs in embedded soft-core, incuding the porting of μC/OS-II and TCP/IP stack.In order to verify the correctness of the interfacing components, This thesis uses DCC-HSMC daughter board of Altera Corporation as a functional module. The test system of AXIe is built to complete the verification of PCI Express data communication, Ethernet data communication, triggering circuit, DDR2 memory circuit, HSMC common interface circuit. Based on the testing result, this interfacing components can accomplish PCI Express communication, work properly at Gen1& Gen2 speed in the x1, x2 and x4 mode. It also can achieve the trigger functions.