Hardware System Design Of The WorldFIP Train Communication Network

World FIP fieldbus is one of the most widely used industrial data bus in the world, developed very rapidly in recent years. Because of its timeliness, reliability, synchronization and single protocol and so on, it is widely used in transportation, energy, railways, electricity and other fields(mainly in Europe). In China, World FIP fieldbus also have some applications in power industry and rail transport.This article relies on the project of World FIP train communication network and mainly introduces the hardware design and development of master device, slave device and World FIP-RS422/485+CAN gateway. The master device is using ARM processor and primarily used as bus arbiter, FULLFIP2 is the communication controller. The slave device and gateway are using Freescale microcontroller chip as the processor, while MICRIOFIP is a communication coprocessor. The slave device is mainly used as a station, but the gateway is mainly used for protocol conversion between World FIP and RS422/485 and CAN.The paper, firstly, described the development of fieldbus and focused on the application features as well as development status at home and abroad about the World FIP. Secondly, analyzed the functional requirements of the system and determine the system design, including the master-slave device hardware circuit design, the major chip model and PCB layout. Introduced the processor of the master and slave device, analyzed the design of key technologies and related solutions, including timing analysis of the large-capacity memory Nand FLASH and communication controller FULLFIP2 of the master device and introduced timing setup of the access of the Microfip of the slave device, and listed some problems maybe happened and corresponding solutions in the design process. Thirdly,Detailed the circuit design of master and slave device functional interface, including power, SDRAM, Nand Flash, USB port, Ethernet, CAN, RS422/485 interface and FIP network communication interface, and described the use of the major chip used in the relevant functional interface. Finally, introduced the communicate connection of FIP network between the master and slave device, and described the test results.The test results show that the system board is operating normally, the function could meet the demand and indicators are all qualified, also could run for a long time in a good state.