Design Of Power Management ASIC For Piezoelectric Energy Harvester

Power management ASIC design for piezoelectric energy harvester is the important device of improving energy harvesting efficiency and sustainable use of energy. In order to extract energy highly efficiently, the design of energy harvester output interface circuit with the impedance matching function is particularly important. According to the output characteristic of energy harvester(EH), this paper focuses on the research of impedance matching circuit between EH and voltage conditioning circuit and designs an ultra-low power power management ASIC for piezoelectric energy harvester. It offers a complete solution for wireless sensor network nodes to realize self-power supply.This paper firstly analyzes the importance and possibility of the ASIC for piezoelectric vibration energy harvester. It also makes a detail summary about advantages, disadvantages and specific application environments of the existing power management technology based on piezoelectric vibration energy harvester. Secondly, this thesis regards the five cantilever array PZT piezoelectric EH which is fabricated in the lab as application basis and then analyzes the output characteristic and builds the equivalent electrical model. Taking the output power, resonance frequency, output voltage and optimal resistance of EH as consideration factors, this paper proposes SECE circuit which is suitable for the piezoelectric EH and the SECE’s power supply mechanism and establishes energy management mechanism. Then it proposes ultra-low power voltage conditioning circuit which’s output can offer the power supply for subsequent wireless sensor network nodes. Based on the process of CSMC 0.18 um CMOS, the Cadence Spectre software is used for circuit simulation. The energy collecting efficiency of SECE has been calculated. The SECE circuit can use 10 seconds to charge the 49 uF capacitor from 0V to 5.2V with the energy transfer efficiency of 54.75% and the last 5 seconds collected energy of SECE circuit is 3.15 times the energy amount collected by traditional full-wave rectifier circuit in correspond period. Besides, the overall quiescent current of power management circuit is 3.25 uA and maximum drive capacity can reach 50 mA. The work efficiency of voltage conditioning circuit can reach 95.2% under 3.17 mA load current. The simulation results have verified the high efficiency and excellent output load capacity of power management ASIC for EH.The thesis has focused on the output characteristic of PZT piezoelectric EH and researched the ultra-low power interface circuit of EH. It has designed a power management ASIC and finished the simulation of whole circuit. The simulation results show that the designed ASIC for piezoelectric EH has realized the requirement of high efficiency and ultra-low power consumption. The power management ASIC can be used in special circumstances in which wireless sensor nodes are self-powered. It has made contribution to basic research of miniaturized monolithic integration self-power supply system.