Research On Fault Tolerance Mechanisms Of Digital System Based On SRAM-based FPGAs

Electronic systems in space and avionics based on field programmable gate arrays(FPGAs) are suffered from soft errors and permanent errors induced by radiation. In order to ensure mission success, the spacecraft system must tolerate all theseerrors. Currently, most of the research works focus on deal with a certain failure, and the works that can cope with both soft errors and permanent errors are less.So a single-chip triple modular redundancy(TMR) system structure with strong fault tolerance as well as mult iple online self-healing mechanisms have been presented to cope with both soft errors and permanent errors effectively in this paper, which combines TMR, scrubbing with evolvable hardware(EHW).The main research works are as follow:(1)The fault types of SRAM-based FPGAs in space and avionics applications are analyzed. And the overall technology solut ion of this paper isdesigned according to the advantages and disadvantages of commonly used fault-tolerant technologies. Moreower, the experimentalplatform, Xilinx Virtex-6 FPGA development kit ML605 and its developm ent environment are introduced briefly.(2)A self-healing system based on partial scrubbing that combinesdynamic partial reconfiguration(DPR)with scrubbingis designed, including the pre-design of functional units, the construction of the hardware platform based on system on a programmable chip, the design of system software and DPR as well as the customization of the scrub IP core.And thevalidity of dealing with soft errors using partial scrubbing is verified by experiments.(3)A self-evolving system based on virtual reconfigurable circuit(VRC) is designed, including the design of the VRC topology, the customization of the evolvable IP core, the construction of the hardware platform as well as the design of the system software.And the feasiblility of the self-evolving reparing system is verified by the evolution of a two-bit multiplier circuit emplemented on the ML605 developm ent kit.(4)A fault tolerant system structure based on the SRAM-based FPGA is designed, and the fault repair ing mechanismsare given.The software of the system is designed, including the overall software structure as well as the flows of repair soft errors by scrubbing and repair permanent errors through evolut ion.Thereafter, the system structure and the fault repairing mechanisms have been evaluated by the design and implementat ion of the 2-bit multiplier and theSobel edge detector on the ML605 development kit, through simulated fault injection.In both cases, scrubbing is utilized to deal with soft errors; whereas forthe repair of permanent errors, gates level evolut ion and function level evolut ionare adopt by two-bit multiplier and sobel edge detector, respectively.And exper imental results show that the system can deal with soft errors and permanent errors effectively.