Preliminary Study And Realization Of Scalable 8-Channel Ultrasonic Phased Array Signal Receiving Unit

Ultrasonic phased array technology is an important part of nondestructive testing technology.The basic principle of ultrasonic phased array detection technology is through the array of multi-array elements to send,receive ultrasound.The defect of the object to be imaging.Through the strict control of each array of excitation signal amplitude and excitation time to achieve the ultrasonic beam focusing and deflection.By changing the deflection angle of the synthetic beam and the focus position of the focus,it is possible to realize a comprehensive and multi-angle scanning of the whole structure and the local structure of the measured object.By adjusting the time delay of the received signal and superposition of the defect location phased array receive echo signal synthesis of the largest amplitude,and inhibition of other locations of the energy and echo,access to defects such as location and shape information.High-resolution and high-quality ultrasonic imaging can achieve by high-precision reception delay control with dynamic focusing and other effects.However,the existing ultrasonic phased array receiver detection system is usually using PLL(Phase Locking Loop),linear interpolation and other echo delay method,these processing methods caused by the receiving system is not flexible,slow data processing and other shortcomings.Based on the research of the key technology of ultrasonic phased array receiving system,this paper presented an ultrasonic phased array detection echo signal receiving method based on FPGA technology.The 8-channel expanded phased in receiving hardware unit is designed to realize the synchronous reception and accurate delay algorithm of echo received signal.Combined with the characteristics of FPGA high-speed and parallel data processing,this paper presents a method to realize the control and data processing functions of ultrasonic phased array signal receiving unit in one or more FPGAs.According to the principle of ultrasonic phased array,the delay algorithm of ultrasonic phased array is deduce.The coarse delay processing of the received signal of each channel is realized by memory offset.The use of multi-rate signal processing in the CIC(Cascade Integral Comb filter)interpolation digital filter signal interpolation delay processing,the signal for high precision fine delay.The delay accuracy is 1.25 ns at 50 MH sampling rate.Moreover,an EPSSC6 chip is used as the processing core platform to construct the echo signal receiving unit,including an FPGA internal data acquisition module,an analog signal condition module,FPGA delay processing module and data send module.The STM8S103 used as the master to control the synchronization parameter settings of the slave FPGA.To achieve the communication with the host computer,through the host computer to the receiving unit to transmit signal parameters.Last but not least,the modules of ultrasonic phased array receiving unit were tested and verified.The experiment results were analyzed and the correctness of the design system and the accuracy of the delay was verified.This work provides technical support for the future application of support in the integrated and high precision phased array receiving system.