Research Of Low Ripple Switched-Capacitor DC-DC Converter

With the rapid development of electronic science and technology,portable electronic products,such as smart phones,electronic paper books,tablet PCs,wearable devices and other electronic products developed rapidly.An intelligent mobile terminal usually requires a very "clean" input voltage,so a high-performance voltage converter is indispensable.The power management system needs not only to provide a stable,efficient,durable energy for each module in the portable electronic equipment,but also its design to meet the miniaturization trend of portable electronic products.Switched-capacitor(SC)DC-DC converter,which only use capacitors as energy transfer medium,compared to inductor based converter,not only save more PCB area but also have less electromagnetic interference(EMI),so SC converter is more preferably when applied to noise-sensitive electronic products.However,SC converter compared with inductor based converter,its output voltage ripple is larger,usually tens of millivolts,and its efficiency is between inductor based converter and low dropout linear regulator(LDO).This thesis,a SC converter with output voltage ripple less than 2mV has been designed through innovated techniques,which making it possible for switched-capacitor DC-DC converters to be used in the noise sensitive occasions.After studied the SC DC-DC converter ripple noise in detail,the ripple-suppression techniques including using trapezoidal wave as the switch driving wave and the multiple discharge step based multi-phase interleaving technology have been presented,effectively suppress the output voltage ripple.In order to improve the conversion efficiency,this article has proposed an automatic gain hopping technique which is based on PFM modulation.In this work,after analyzing the system performances including conversion efficiency,output voltage ripple,driving ability and transient response time,and building system loop model,the optimal switching frequency,switch size and the performance of each sub-module have been derived.Based on smic 0.18 um CMOS process,after building a verilog A system model,the transistor-level design of each module,including the internal reference power module,error amplifier module,switched capacitor array,adaptive frequency modulation module,automatic gain hopping module,and driver circuit,have been complised.Then,the spectreverilog simulation results show that when the input voltage is in the range of 2.6V ~ 4.2V,with the maximum load current of 60 mA,the maximum output voltage ripple is less than 2mV,which meets the design requirement.