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Research On Some Key Technique Of Shunt Active Power Filter

Posted on:2019-04-27Degree:MasterType:Thesis
Country:ChinaCandidate:P XuFull Text:PDF
GTID:2322330542492823Subject:Electrical engineering
Abstract/Summary:PDF Full Text Request
With the continuous use of power electronic devices and the increase of nonlinear loads,harmonics in power networks have drawn more and more attention.As a typical device for power quality control,active power filters,with their superior dynamic and stability Performance,has been widely used,therefore,this paper takes the three-phase four wire shunt active power filter as the research object,focusing on which involved three-phase grid synchronization technology,FPGA control algorithm optimization computing and multi-module Active power filter parallel current-sharing communication and HMI were studied and designed.In this paper,starting from the principle and structure of the traditional phase-locked loop,the existing problems are analyzed.At the same time,some improvements are proposed for the phase-locked loop based on the double-complex coefficient filter.The detailed analysis and modeling are given.The dynamic performance is analyzed.The parameters of the loop filter are set by the pole-zero cancellation method.Finally,the algorithm of PLL is realized by FPGA.The simulation and experimental results verify The effectiveness of the algorithm.In order to speed up the operation speed of the control algorithm and improve the precision and performance of the system,this paper adopts the FPGA chip with the characteristics of parallel high operation rate to realize the control algorithm.A sliding window iterative DFT algorithm suitable for APF is studied,the advantages and disadvantages between SDFT and FFT algorithm are compared,and putting forward a method of definite periodic clearing based on staggered parallelism for its stability.Meanwhile,the SPWM modulation algorithm suitable for APF is summarized,and the algorithm mentioned is applied under the simulation and experiment with the FPGA platform,the results verify the correctness and effectiveness of its implementation.Finally,the multi-modular parallel current sharing is designed,and the basic principle of the average flow coefficient distribution and the output current sharing algorithm is analyzed.The implementation of the CAN bus is explained in detail,and a self competitive master-slave mechanism based on CAN bus is proposed.The multi module HMI display is designed,and the RS485 bus communication mechanism based on Modbus protocol is adopted.At the last,the validity and correctness of CAN bus current sharing and RS485 communication are verified by experiments.
Keywords/Search Tags:active power filter, FPGA, three-phase phase-locked loop, double complex coefficient filter, Sliding DFT, current sharing control, CAN bus, modbus protocol
PDF Full Text Request
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