Fault Analysis And Removal Technology Of Flexible DC Power Grid

At present,the development of DC power grid is faster and faster.Compared to AC power grid,the DC grid voltage is stable and its control is easy.The application of a wide range of modular multi-level inverter occupies an increasingly important position,its strong scalability,low device requirements,the output harmonic wave low,is the future of high-voltage DC an integral part of the field.However,considering a half-bridge-based modular multilevel converter,when its DC side fails,the diodes at both ends of the IGBT in the submodule will continue to be current supply path,it is likely to cause over-current damage to the diode.Considering the DC fault clean-up,while the DC circuit breaker fault removal technology is not mature,fault removal technology is not perfect.Therefore,the research on the fault limiting scheme of DC power system basing MMC is of great significance.Study on DC fault of DC power supply in MMC cleaning based on,this paper firstly analyzes the DC fault,three phase fault characteristics of half bridge MMC bipolar short-circuit fault,and the capacitance equivalent first phase fault equivalent circuit are verified by.Based on the fault characteristic,fault current shunt,detailed comparative analysis of the fault current limiting,and puts forward a new fault current limiting measures of protection schemes.Then improve and perfect the principle of handshake.At the same time,based on the widely used modular multilevel converter and its own characteristics,the new scheme for the fault capacitor voltage clamp technique based on clearance were analyzed and summarized,obtained the most economical and practical,and improve the self-resistance of sub module structure.Analysis of fault capacitor voltage clamp technique based on the cleaning method the best prospect,but the fault clearing time uncertainty.Finally,the fault-blocking time based on capacitor voltage clamping technology is studied in detail.The influence of resistance,inductance and capacitance of the sub-module on the blocking time is analyzed.Finally,the correctness of the theoretical formula is verified by simulation.And we design the resistance of the faulty loop according to the actual system.