Accelerator On Line Energy Verification System Based On FPGA

During the experiment on the accelerator,if the actual energy of the accelerator does not match the preset energy of the accelerator,the consequence of the experiment will be unpredictable.So the energy verification on-line of the accelerator systemis necessary.There are two ways of accelerator energy verification.One is calculating the energy from accelerator radio frequency.The other is getting accelerator energy information from the accelerator dipole current.We use the way based on the relationship between the energy and radio frequency rather than the relationship between then energy and dipole current.Because the relationship between the energy and the current value of the dipole iron is not all linear.It includes the linear part and nonlinear part which are not easy to design the software.Therefore,we measure the accelerator RF signal and calculatethe energy of synchrotron.There are a variety of frequency analyzemethods,including software and hardware.However,only using software method cannot analyze real-time signal,and cannot give the result offrequency analysisin the sub millisecond time.Only using hardware method is very difficult to build data transmission and processing.So a design based on FPGA is a wise choice.Today,the FPGA is used widely in industry of programmable logic device.FPGA program is running on the hardware logic unit and real-time accessingsignal as PCB board,but it is designed using VHDL language like a software program.Therefore,it has become an ideal method of implementing a real-time system.We build the system platform on the industrial products.The article’s scheme adopts NI PXIe-1082 8 slot cabinet,PXIe-8135 controller.UsingNI 5751 B adapter as data acquisition adopts and NI PXIe-7975 R as digital signal processer.The software development environment is NI Lab VIEW.The design idea is to calculate the true frequencyby FFT and get the energy value.Because the collected RF signal is an analog signal,it is necessary to converts the analog signal to digital signalthrough ADC module Firstly.Then it is calculatedby FFT.Secondly,the actual frequency iscalculatedby using bubble sort method to find the maximum value.Thirdly,the corresponding presetfrequency is calculated according to the preset energy of the accelerator.Lastly,according to the result offrequency comparison,the beam should be cut off when the energy is wrong.In the design process,we choose proper parameters about △f and fs.Finally,650 microsecond FFT calculating time is realized and it meets the system requirement.The accelerator on line energy verification system can be accessed by any external application through OPC UA protocol.In the server design,The.Net interface provided byLab VIEW as server.Therefore,we encapsulate several DLLs for complex logic method.They can be called in LabVIEW.The article gives the test result.We simulate the normal,the error frequency,thenormal and error energy situation respectively.The function and accuracy of the system is verified.