The Research Of Image Fruit Size Screening Based On Image Processing Technology

Fruit size screening is one of the indispensable links in fruit processing after picking. Traditional artificial screening can’t meet the requirements of efficiency and precision, and always damage the test target. Using image processing technology to screen fruit size can solve all these problems. Taking apple size screening as the research target, the main content of this thesis is using machine vision and image processing technology, combining with FPGA, designing one fruit size screening system.Through the study to traditional technology of fruit screening, it’s discovered that using computer separately to realize fruit screening disadvantages of long screening time, high cost, low speed and moving difficulty.Given the wild using of image process technology and advantages of high speed, concurrent working and abundant resources of FPGA, this thesis completes system design project, using FPGA as the core processor and combining with image processor technology, realizing image information sampling of target,data stroe and image processing algorithm.Contraposing apple diameter size screening, through summarizing and analyzing the traditional fruit size screening methods, a new method, equivalent diameter which compares the image pixel data with the size of real objects is token to realize apple size screening.The judgment parameters are set at the upper computer, the parameters are sent to FPGA through serial port. FPGA acquires pixel data of target’s edges after calculate sampling data in image process algorithm, compare the pixel data with the set of parameters, then judge the rank of the target. According to the result, FPGA start the stepping motor, upload the rank value to the upper computer application program. The program displays the result value, realize apple size screening. Apple color screening is realized by HSI algorithm in Verilog HDL language. Sampling of target.The system hardware design includes image sampling circuit, SDRAM data store circuit, VGA driver circuit and stepping motor driver circuit.Taking FPGA as the processor in this system, all the drive programs are competed by Verilog HDL programming language.In order to reduce processing time of image process algorithm and combine the advantages of concurrent working of FPGA, median filter algorithm and sobel edge detection algorithm are added to process sampled image information.Upper application program is designed in VC6.0, download parameters and data collecting are the main function of the program.Through system debug and sampling data analysis, this system can screen and test apple diameter size, meeting the design requirements.