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Design Of A ECG Signal Process Module

Posted on:2018-07-13Degree:MasterType:Thesis
Country:ChinaCandidate:J P ZhuFull Text:PDF
GTID:2334330515962728Subject:Engineering
Abstract/Summary:
In recent years, with the rapid economic and social development, people’s health awareness gradually increased,and the timely monitoring of their health status has higher requirements. Portable home wearable health monitoring equipment market came into being. In the health monitoring of various physiological parameters of the human body, real-time monitoring of dynamic ECG signal is an indispensable part.However,long time monitoring of ECG signals is bound to produce large amounts of data. On the one hand, large number of raw ECG data through the wireless upload to the terminal will take up a lot of power consumption; On the other hand,it is very easy to feel fatigue and produce missed or wrong detection of heart diseases, if only rely on the physician to analyze the large number of heart beats. Therefore, it is necessary to develop a low power ECG intelligent processing module, which is applied to health level portable Wearable ECG intelligent sensor nodes. To achieve real-time monitoring of dynamic ECG signal and automatic analysis of ECG beat types, provide concise and accurate ECG information for doctors, has an important significance to realize the dynamic monitoring of human health conveniently.The ECG signal processing algorithm includes four parts: noise elimination, R peak detection, heart beat characteristic parameter extraction and beat types recognition. Noise elimination algorithm uses wavelet transform threshold shrinkage method to eliminate muscle noise, baseline drift, electrode motion artifact and power frequency interference. The algorithm can preserve the waveform of ECG signal better while filtering out the noise. The R peak detection algorithm uses biorthogonal quadratic spline wavelet to detect the position from 3 and 4 scales coefficients. And then according to the location of the R peak cut out the sample heart beat, and extract the high-order cumulant characteristics. The classification section uses a group of support vector machines to obtain multiple classification results by voting.The algorithm hardware implementation takes into account factors such as flexible configurable, low power consumption, space saving and efficient computing.The hardware modules include reconfigurable wavelet transform operators and multi-class support vector machine decision-making operators. Low power optimization design is mainly reflected in the algorithm level and hardware structure level, including the reduction of redundant calculation, reduce the number of shared memory read and write times,a reasonable set of clock gating,and so on. Reduce the hardware structure by reusing the basic function modules and storing the data reasonably. In addition, hardware modules can be flexibly reconfigurable to support multifunctional computing by rationally designing the control logic of the finite state machine. While also having the power consumption, area and speed advantages of application specific integrated circuits (ASICs). The ECG signal processing hardware module of this paper is implemented by 0.13pm process. Its power consumption is 27.8μW, with the area of 2.43mm~2.
Keywords/Search Tags:ECG signal processing, wavelet transform, support vector machine, low power, reconfigurable hardware
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