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Research On Radiation-Hardness-by-Design For Timing Circuit Of PWM DPS

Posted on:2015-01-11Degree:MasterType:Thesis
Country:ChinaCandidate:X W LiFull Text:PDF
GTID:2348330485493816Subject:Microelectronics and Solid State Electronics
Abstract/Summary:PDF Full Text Request
The CMOS digital pixel sensor(DPS) based on the principle of pulse-width-modulation(PWM) with the advantages of low power, low noise and simple structure is used in various fields. It also has extremely important research value in the application of spatial environment, especially in the fields of space exploration, remote sensing image and sun sensors. The timing circuit of CMOS DPS plays an important role in the whole working process of the image sensor. Therefore, based on the single event effects and total ionizing does of the timing circuit using in the spatial environment, this thesis will carry out the research of the radiation-hardened-by-design(RHBD) timing circuit.This thesis studies single event effects(SEE) and total ionizing dose(TID) effects on timing circuit. The logic value of flip-flop in timing circuit can be upset by SEE. TID can increase the leakage current of timing circuit, seriously, can make timing circuit cannot work normally. For these two radiation effects, an RHBD standard library has also been developed for the design of the timing circuit. The standard library contains 25 logic units and some filler cells. SEE and TID of timing circuit are hardened by using the methods of gate sizing, structural redundancy and gate-enclosed NMOS. Meanwhile, a double-node upsets-tolerant latch is presented. This structure also can tolerant part of triple-node upsets and single event transients at input port. In addition, the test bench of timing circuit is designed using Verilog. After the validation, the layout of the timing circuit is achieved by the automated design process which is designed using Perl and TCL.On 0.18?m CMOS process, the area of the proposed latch which can tolerate SEE in timing circuit is 186.12?m~2. The setup time of the latch is between 1.16563 ns and 1.32871 ns when the clock transition time and data transition time are both within the range of 0.008?1.5ns. The area of the timing circuit is 1266.48×320.02?m~2. Finally, the prototype chips have been fabricated through GSMC 0.18?m CMOS technology. The experimental results indicate that the timing function of PWM DPS can be achieved by the designed circuit.
Keywords/Search Tags:digital pixel sensor, timing circuit, single event effects, total ionizing dose, RHBD standard library
PDF Full Text Request
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