Research On ESD Failure Mechanism And ESD Protection Circuit Of Integrate Circuit

With the development of integrated circuit, the performance of chip is better and better by advanced techniques. However, the ability of bearing the Electro-Static Discharge(ESD) is weakened and the demand for the endurance of ESD do not lower but is higher and higher which makes the circuit design of ESD protection circuit more difficult. The study of ESD protection internal falls behind the advanced international level, especially the homemade integrated circuit chip. The ESD have reduced the finish product rate and reliability dramatically. So the research of the chip’s ESD has important significance.This thesis deals with the homemade JSR26C32X-S chip with radiation defense and four channels difference receiver and its ESD is estimated by the test and invalid analysis. The primary research content includes the three models(HBM, MM and CDM) test for the ESD, the analysis for the invalidity mechanism of ESD and comparison of the ESD defense of three models and design improvement.Firstly, the test schemes are designed for three models and the invalid threshold of JSR26C32X-S is 5000 V 200V and 300 V under the Human Body Model(HBM), the Machine Model(MM) and Charged Device Model(CDM), respectively. Then, the caparison of three invalidities is made and their reasons are analyzed. The input difference pins are easy to be invalid under HBM and MM for the reason that the polycrystalline silicon ligature for connecting the diode for ESD protection is punctured. To improve the endurance of ESD for HBM and MM, the improved protect circuit which utilize more efficient protection structure of GGNMOS or SCR and measures for the ESD defense of input difference pins are proposed. What’s more, the ESD protection of CDM is much stronger for the reason that the NMOS and PMOS pins with huge area in output buffer circuit release enormous ESD current when the ESD event happens.In summary, this thesis studies the ESD protection of homemade JSR26C32X-S chip with radiation defense and four channels difference receiver. And the easiest invalid parts are discovered by a series of tests and failure analyses and the improved protection structure of ESD is proposed. The structure can be used in the chip and other same kind of chips in industry or military field, and its product rate and reliability will be enhanced dramatically.