System States Management In Hybrid Memory Architecture

With the development of multi-core/many-core processor technologies and the emergence of data intensive applications, the traditional DRAM(Dynamic Random Access Memory) is unable to meet the requirements: large-capacity, high-bandwidth and highperformance. Fortunately, the development of NVM(None-Volatile Memory) technology brings a good opportunity to break the bottlenecks of energy and performance restricts of DRAM. These non-volatile memories have high density, strong expansibility, byte-addressable, no standby power consumption, and high speed of read and write features. So we can combine the DRAM and NVM, to construct hybrid memory architecture to save and restore system fast by using non-volatile feature of NVM while exploiting low access latency advantage of DRAM.The design NVMCR(None-Volatile Memory Checkpoint & Resume) is based on the high density, strong expansibility, byte-addressable, no standby power consumption, and high speed of read and write of features of NVM,NVMCR has a fast save, fast recovery, high scalability character. A concrete consistency policy is proposed in NVMCR to ensure consistency of system states. Besides, we design a specific mirror data structure to improve performance of NVMCR. A concrete restore mechanism is also raised to recovery system status.The experimental results show that NVMCR can save and restore the states of system under the hybrid memory environment correctly and fast. Saving and restoring the system states can be completed within one second.