The Design And Verification Of Key Peripherals Of X-DSP

Being independed designed,X-DSP is a high performance multi-core DSP.It adopts VLIW architecture and SMID technology,supports fixed-point and floating-point operations.UART and timer are both key peripherals of DSP,they are important to the application of X-DSP. After a thorough research on UART interface specification,this paper has designed a UART which has sufficient degrees of freedom when being configured and has various functions.And according to demands of X-DSP,this paper has also designed a configurable,scalable watchdog timer.Here summarize the main content in this paper:1.According to bus interface specification of X–DSP,bus interface of UART and timer has been designed.This interface achieved VALID-READY handshaking between the bus and peripereals,made peripherals process write/read request from the bus correctly.2.A decreasing prescaler and a filtrating structure have been designed for baudrate clock and serial data sampling,coupled with FSM and data cached FIFOs,the UART has achieved serial communication with other devices. A interrupt processing machanism with priority has also been designed. Generation of interrupt causes CPU and EDMA to access UART through bus interface,this has achieved data interaction inside the chip.3. Using functional coverage method,Simulation based verification has been used for functional verification of UART at module level and system level. Testbench at module level was developed according to each functional unit of UART.At system level,data communication inside and outside the chip was verificated principally.Then, FPGA emulation for UART was given.4. Modularization method has been used in design of the timer,this has made timer achieved clock source selecting,counting under different configurations and generation of output events.Then,a watchdog FSM was designed for the application of timer.Simulation based verification was then used for verificating timer at module level and system level.Finally, FPGA emulation for timer was given.In 40 nm CMOS process, synthetize these two key peripherals with Design Compiler,which is a tool produced by Synopsys.The result indicates the performance of UART and timer satisfy the goal of X-DSP, and parameters are as follows:The area of UART is 30256.6,static/dynamic power of UART is 0.7492 mW /2.1461 mW. The area of timer is 70508.4, static/dynamic of timer is 1.0798mW/6.3402 mW.