Study And Design On Efficient Hard-decision Algorithm Based Reed-solomon Decoder

Reed-Solomon(RS)codes are widely used in various digital communications systems and storage systems due to their excellent error-correction capacity.Compared with Algebraic Soft-decision Decoding algorithms,Hard-decision Decoding(HDD)algorithms are more frequently used for their simplification and regularization.HDD algorithms mainly include Berlekamp-Messay(BM)algorithm,Modified Euclid(ME)algorithm and Step-by-step Decoding(SBSD)algorithm.Among the three algorithms,SBSD algorithm is only efficient in decoding short RS codes.This thesis focuses on SBSD algorithm and BM algorithm.By overcoming the shortness of these two algorithms,new algorithms and architecture are proposed.RS(23,17)codes are used in the Ultra-wide Band(UWB)system for protecting important header information,which can be decoded efficiently using SBSD algorithms.However,the existing SBSD algorithms share two main problems.First,the existing SBSD algorithms take two different ways to decode when the error number is equal to error-correction radius t or not,which reduces the efficiency.Second,existing SBSD algorithms are always parallel algorithms while RS decoders are always implemented in pipelined architecture.Since other blocks take long time,rather than reducing the latency efficiently,the parallel algorithm increases the hardware complexity.To solve the problems,a modified SBSD(M-SBSD)algorithm is proposed in this thesis.M-SBSD algorithm adopts a unified strategy to decode the both situations,which significantly increases the efficiency.Moreover,a pipelined decoder is also proposed for RS(23,17)codes.Compared with the existing SBSD decoders,the proposed decoder reduces at least 11.3% hardware requirements with much lower computational complexity.Enhaced Parallel inversionless BM(ePIBM)algorithm is the most efficient algorithm among the existing BM algorithms.However,the direct implementation of ePIBM architecture will introduce a large amount of idle time,which results in low hardware utilization.This thesis proposes a recursive ePIBM(rePIBM)algorithm,which employs new initialization to further reduce latency.Based on rePIBM algorithm,a decoder for RS(255,239)codes is proposed as well,in which pipelined Galois-Field(GF)multipliers are also adopted to reduce the critical path delay.The synthesis results show that our decoder can operate at575 MHz to achieve the data rate of 4.6 Gbps.Moreover,compared with various previously related designs,the proposed RS(255,239)decoder is at least 28.15% more efficient.