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High Efficiency Video Coding Algorithm Optimization Using CUDA

Posted on:2018-09-09Degree:MasterType:Thesis
Country:ChinaCandidate:X L ChenFull Text:PDF
GTID:2348330518988073Subject:Communication and Information System
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With the higher and higher demand for the definition of the video,the compression effect of H.264/AVC video coding standard can not meet people's new demand any longer.Thus,a new coding standard is developed by internatinal orgnization ITU and MPEGE named HEVC(High Efficiency Video Coding).HEVC follows MC/DCT hybird coding framework.In order to improve the video coding quality and efficiency,technical innovitions have been adopted in every aspects by HEVC.The compression ration of HEVC is two times as H.264 in HD videos' high-class at the same coding condition.However,at the cost of highly compression ratio,the algorithm complexity increases sharply simultaneously,which will cause longer time delay and further hinder the application and popularization of HEVC.Only the advancement of coding speed can satisfy the application requirements,hense,it is neccesary for us to optimize the coding process of HEVC.The optimizing of HEVC coding is studied from the perspective of parallel computation in this thesis.The HEVC video coding framework is analyzed,especially for the timeconsuming inter-frame coding,there are a lot of complicated and repetitive operations in its motion estimation part.Hense,parallel optimization technology is used for motion estimation.The parallel optimization is executed in CUDA,and the original modules are transformed making use of the GPU's parallel computation Architecture characteristics.In this thesis,CUDA is used to optimize the integer-pixel motion search,interpolation and subpixel motion estimation of HEVC.At the same time,the parallel optimization algorithm which based on GPU is proposed to improve the motion estimation of inter coding part in HEVC encoder HM 10.And a motion vector prediction algorithm which based on GPU is also proposed in this thesis.This algorithm provides the starting point for the motion search and improves the accuracy of the search under the parallel template.In the sub-pixel motion search,a simplified search template is proposed to improve the search efficiency.In the final thesis,a scheme for the acceleration of HM CPU encoder is put forwarded by using CPU multi-thread and GPU multi-thread.The end of CPU use two thread balance encoding scheme,the main thread execute the main encoding,a thread is responsible for calling the CUDA function and transmitting the data.The scheme executes coding on CPU when GPU executes operation through asynchronous parallel encoding,hiding motionestimation time.Experimental results show that the encoding time of integer-pixel motion search and subpixel motion estimation can be reduced by using CUDA.The encoding time to accelerate the ratio can be reached 8 times and 23 times respectively.The encoding time reduction of brightness pixel interpolation and chrominance pixel interpolation to accelerate the ratio can be reached 58 times and 53 times respectively.For the entire inter-coding loop,CUDA parallel optimization of the acceleration ratio can reach about 1.6.With the improvement of video sequence resolution ratio,the acceleration effect is more apparent.Parallel optimization can improve the compression rate under the same compression performance compared with the original compression method.
Keywords/Search Tags:Video Encoding, HEVC, Motion Estimation, CUDA, Parallel Computing
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