Simultaneous Switching Noise Time-domain Analysis For The High-speed Digital Circuits

With the development of high-speed digital circuits which towards high integration,high speed,low supply voltage and high current,the importance of Power Integrity(PI)problem is raised increasingly.The performance of Power Distribution Network(PDN)has increasingly high requirements.The PDN is not only an independent power transmission path problem,but also affects the Signal Integrity(SI)and Electromagnetic Integrity(EMI)issues.This thesis analyzes the close relationship between PI,SI,and EMI,and discusses the collaborative design of them based on the physical basis of PDN.Simultaneous Switching Noise(SSN)which affects the performance of the high-speed digital circuit system seriously is one of the most important aspects of the research on Power Integrity.The low supply voltage results in a lower power supply noise margin,which requires careful design of the PDN and accurate calculation of the SSN during the circuit design phase.At present,the research and analysis of PI are mainly based on the frequency domain.however the frequency domain is a steady-state analysis domain.There is always a lot of shortcomings in the transient response of SSN based on frequency-domain analysis.In order to describe the transient characteristic of SSN accurately,the problem of PI needs to be analyzed from the time domain.Transient simulation of SSN using simulation tools is a commonly used method for time domain analysis.However,transient simulation not only causes large deviation and even errors due to improper setting of simulation time step but also takes a lot of simulation time and computer resource.In order to improve the accuracy and efficiency of SSN time-domain analysis,this thesis presents a fast and accurate method for calculating SSN analytic.The method is based on the function of impedance and switching current,and combines the the convolution calculus property of time domain and frequency domain to achieve accurate solution of SSN.Respectively,the on-chip PDN and the out-chip PDN of 3D chip stack are modeled as the lumped model and broadband macro model.Then the ADS simulation tool is used to extract the amplitude and phase parameters of the PDN impedance.Finally,the vector fitting algorithm is used to obtain the impedance function.The switching current is modeled by triangular wave to determine the function of simultaneous switching current.According to the convolution calculus property of time domain and frequency domain,the impedancefunction and the switching current function are simply converted,so the time domain analysis of SSN can be obtained quickly.In this thesis,an example of 3D chip stack is given to compare between the proposed method of SSN calculation and the transient simulation of ADS simulation tool.The results show that the proposed method is more accurate and more efficient than ADS simulation.The proposed method will become great practical value in the high-speed digital circuit design phase about the accurate analysis of the SSN at the PDN.