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Key Techniques Research On Optimization Of Parallel Programs For Parallella Embedded Platform

Posted on:2016-08-06Degree:MasterType:Thesis
Country:ChinaCandidate:F Y FanFull Text:PDF
GTID:2348330536467365Subject:Computer Science and Technology
Abstract/Summary:PDF Full Text Request
The research of embedded computing theory and architecture is always having a strong requirement,the rise of the Internet of things,smart grid,intelligent medical,intelligent consumer electronics,intelligent building,intelligent vehicles,environmental monitoring has brought great development potential for the embedded.Meanwhile,with the increasing types of embedded applications and the complexity of embedded computing is becoming more and more complex,the traditional single core processor has been unable to meet the needs of application.This requires a lot of researches for the embedded multi-core processors.The traditional embedded multi-core processor is dedicated to improving the MIPS value of the energy consumption per watt,while Adapteva company's Parallella embedded multi-core platform is committed to improving the FLOPS value per watt of energy consumption,which provides a new research direction for the embedded multi-core platform.In this paper,we choose the embedded multi-core platform of Adapteva,and study the architecture and programming model of the platform to understand the advantages and bottlenecks of the embedded platform and to learn and master the parallel programming method of this platform.Then we select several typical testing algorithm,analysing the characteristics and parallelism of the algorithm to achieve the programming on Parallella and analysis the performance portability of the Parallella.In this paper,six algorithms are studied and implemented,which is based on the computation intensive,data intensive and control intensive algorithm.The experimental results show that the algorithm can achieve good parallel speedup when the kernel of Parallella is effectively utilized.
Keywords/Search Tags:embedded multi-core platform, Parallella, parallel programming, performance portability
PDF Full Text Request
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