Signal Integrity Co-Design And Analysis For High-speed LPDDR4 Based On PoP Structure

In mobile device,the data transmission has the closest relationship between baseband and memory chip.With the development of the Integrated Circuit manufacture process,the speed of memory chip has reached hundreds of millions of hertz and more.At the same time,signal integrity problem became more serious,because of more power consumption and lower supply voltage.Po P is a 3D package technology which integrated baseband and memory in the vertical direction.Po P technology,which optimizes the package structure without affecting the chip architecture,has the advantage of signal integrity design and rising the system performance,so it is widely used by baseband manufacturer.This thesis focuses on the research for baseband chip and LPDDR4 Po P structure high-speed signal integrity Co-design.The main content is discussed as follows: I)The thesis introduced Po P and LPDDR4 structure,researched the influence facts for signal integrity,such as basic transmission line theory,characteristic impedance,loss,reflection,crosstalk and ISI,etc.By introducing the parameters of LPDDR4 interface,this thesis figures out the evaluation criteria for the performance of signal channel.II)By discussing the influence facts for signal integrity,this thesis achieved a project for advanced Po P structure package board floor plan and route which considered the signal integrity facts.III)This thesis focus on the issue which SPICE simulation consumed too much time puts forward a method which converts SPICE model into IBIS model in co-simulation link.This method has excellent simulation efficiency with high accuracy.IV)In co-simulation drive model modeling,the traditional method always used PRBS as input,this method exists design risk because of the uncertainty for PRBS.By comparing the difference which using PRBS,the worst binary sequence,modified DMI in simulation,this thesis improved the precision and reduced the risk for signal integrity co-simulation by using modified DMI.V)By system frequency domain analysis and comparison of SSN influence fact,this thesis figured out the importance for power distribution network.By carrying out power integrity and signal integrity co-design method,this thesis measured the influence for power noise in signal integrity.Based on the research of this thesis,a Po P structure is designed.By comparing the eye diagrams result of actual chip testing and Interposer layer testing,the signal integrity and power integrity co-design meet the performance spec demand.This design method give a good reference for advanced package research and baseband performance improving.At the same time,this paper simply consider the signal integrity and power integrity issues of the transmission.For ensuring the rationality of channel performance,it should be perfected the electromagnetic interference,thermal design and other aspects.This paper only discuss the equivalent resistance and capacitance of the chip’s power integrity,it should be further amended the on-chip layout plan and other aspects.