Design And Realization Of Generalized Laguerre-Volterra Model(GLVM) Based Hippocampal Neural Network Biochip

Hippocampal prosthesis biochip is a neural chip.At present,human beings are trying to replace the damaged hippocampus with a biochip to treat the loss of memory and cognitive dysfunction caused by the damage of the hippocampus.In this thesis,we focus on the core module of the hippocampal prosthesis biochip,namely the hippocampal Generalized Laguerre-Volterra model(GLVM)-based neural network biochip.It implements the GLVM algorithm of the hippocampus,which realizes the memory function of the hippocampus,that is,converting short-term memory into long-term memory.At present,the research on the hippocampal neural network biochip started shortly,mainly in the establishment of the mathematical model of the hippocampus,reducing the complexity of the model and FPGA hardware verification stage.Due to its low power consumption,small area and high reliability,Application Specific Integrated Circuit(ASIC)technique is used in this thesis to implement the hippocampal neural network biochip.Based on the mathematical model of the hippocampus put forward by American biologists,this study proposes a parallel architecture and a time division multiplexing architecture based on biochip ASIC hardware,especially the latter,which greatly reduces the hardware consumption of the system and has the advantages of small area and low power consumption.The main work and innovation of this thesis are as follows:1.A Gaussian error function circuit with high precision,high speed and small area for GLVM model was designed and the correct silicon verification was obtained under 180 nm process.2.A low-power Gaussian random number generator circuit for the GLVM model was dcsigned and the correct silicon verification was obtained under 180 nm process.Compared with the scheme based on the central limit theorem used in the references,the power consumption can be reduced by 94.76%,which is more suitable for use in the hippocampal neural network biochip.3.This thesis points out the errors in the paper about the convolution part of the hippocampal mathematical model.The correct parameter values were derived and given.Convolution unit circuits with low power consumption and small area were designed.4.The algorithm of machine learning was successfully used to solve the problem that the coefficients in the GLVM do not converge.However,no solution to this problem is yet involved in any paper.5.The first hippocampal neural network biochip that implements the GLVM algorithm in China was successfully designed.The chip is based on a parallel processing architecture implemented in a 40 nm CMOS process with a design scale of 1.629 million gates and a power consumption of 111.5 μW.6.The time-division multiplexing architecture is proposed to replace the parallel processing architecture.Making the core area of the chip reduced by 84.94%,power consumption decreased by 24.30%.