Font Size: a A A

Research Of Low On-resistance High Voltage LDMOS Device

Posted on:2019-03-08Degree:MasterType:Thesis
Country:ChinaCandidate:L LiFull Text:PDF
GTID:2348330569487877Subject:Microelectronics and Solid State Electronics
Abstract/Summary:PDF Full Text Request
Rencent years,because of the increasing market demond and the strongly support of China government,the integrated circuit in our land has achieved a great development.The technology gap from other countries is also narrowed.As the application level increases and the application requirements are gradually improved,in order to meet the specification of high voltage and low conduction loss in the integrated circuit,various improved power device products emerge as the times go.As one member of power IC,LDMOS plays an important role in various fields,such as intelligent automotive electronics,lighting system drive,switching power supply and so on.With technolygies that already exist,there is still a long distance to reach the silicon limit.In view of this problem,we propose a modle of SOI LDMOS with linear doped drift region,through which we can design any SOI LDMOS with accurate parameter via calculation.Based on this model we also achieve a new ultra-thin SOI LDMOS with sectional linear doped drift region.The experimental results exhibit a Ron,sp of 154.2mΩ·cm2 with a BV of 960 V.This represents a reduction in Ron,spn,sp by 33.1%when compared with the conventional linear doping in drift region.The main contents of this work are as follows:1.Model derivation of SOI LDMOS with linear doped drift region,Based on the 2-D poission equation,with premise that drift region is full depleted,we conduct a model of traditional SOI LDMOS with linear doped drift region.The relationship between electric field and linear doping slope is proposed,which has a generality both of thick SOI and thin SOI with full field plates.2.Design and verification of ultra-thin SOI LDMOS whith sectional linear doped drift region.As the model shows,there is a high resisitance region near source,most on state resistance comes from here,by desining new process windows,we increase the concentration near source.Simulation in Tsuprem4 has applied,The experimental results exhibit a Ron,sp of 154.2 mΩ·cm2 with a BV of 960 V,which represents a advanced technology.
Keywords/Search Tags:Linear doping, SOI LDMOS model, High voltage, Low on state resistance
PDF Full Text Request
Related items