Software Design And Implementation Of The High Speed Data Acquisition Module Based On PCIe

The development of science and technology has led electronic measuring instruments to develop in the direction of high performance,multi-functionality and modularization,and the concept of synthetic instruments has evolved at this time.Simultaneously,the integration of the rapid development of embedded technology into the research of synthetic instruments also makes its advantages in all aspects more prominent.As a core module in the synthetic instruments which we studied,the function and performance requirements of the data acquisition module based PCIe are also increasing.In this thesis,the software layer is designed based on the hardware composed of PowerPC control board and FPGA data acquisition card of the synthesis instrument.First,setting up a driver software development and operating environment in the Linux system,including the installation of LTIB tools,TFTP services,NFS,and Minicom serial debugging tools on the host computer.In addition,it is necessary to transplant the embedded Linux system for the PowerPC control board,including the transplantation of U-Boot and Linux kernels,and making the root file system.Second,developing the PCIe driver in Linux environment,and using DMA double buffer to achieve ping-pong operation,interrupt,memory barrier and other key technologies in the read and write function of the driver for its performance optimization while read or write data.Then designing the read or write data applications for the driver,which allocates different size buffers to the transfer data to test its impact on the PCIe bus data transfer rate.Third,designing the host computer for the Gigabit Ethernet module of the data acquisition card through the socket programming of class QUdpSocket in the Qt integrated development environment,which eliminats a lot of complex codes.The host computer realizes the sending and receiving data and some data processing of the FPGA data acquisition module,it provides a visual interface for the debugging of the FPGA data acquisition card.The last part is to test and verify each module of the disigning.The driver software includes the system startup of the device,the loading of the driver,the reading and writing of the PCIe base address registers,and the function and speed of reading and writing data for the driver.The host computer includes sending data to the FPGA data acquisition card and receiving the data returned by the FPGA data acquisition card,which to verify the functions of the Gigabit Ethernet module and the DDRII memory module,and the rate of reading or writing data.From the test results,it can be seen that both of these software designs basically meet the expected requirements.