| Now under the background of information age, the importance of ADC is becoming increasingly. It`s becoming more and more demanding to the requirement of converting speed, power, and area. These properties determine the performance of the signal processing system, and also indirectly determines the development of the ADC technology level. The interpolation structure Flash ADC get more and more attention of people with it’s characteristics of high speed, low power dissipation, small area.This paper design a 8 bit 1GHz interpolation structure Flash ADC by TSMC 0.18μm CMOS technology combined with Cadence platform. It mainly includes: bandgap voltage reference, the partial pressure resistance network, preamplifier, interpolation structure, high speed latch comparator, bubbles eliminate circuit, encoder. Among them, the Bandgap voltage reference source use the PTAT current generated structure. Within the range of-50℃~80℃ temperature simulation, it concluded that the temperature drift coefficient is 8.3 ppm/℃. Using open loop positive feedback structure as it’s preamplifier. By the simulation, we got the gain is 38.4 dB, the unit gain bandwidth is 743 MHZ. The dynamic latch comparator is made of the latch structure and the offset difference structure. By 5 GHz clock frequency, it not only achieved the function of compare at high level, also reached 21 ps response time. The resistance interpolation structure, increased the number of passing zero, saved nearly three-quarters of the preamplifier, reduce the power consumption and also save the area.By the simulation of the ADC, we got it’s parameters as follow: power supply voltage is 1.8v; the input signal is 20 MHz sine wave; static characteristics INL is 0.35 LSB, DNL is 0.2 LSB; dynamic characteristics SNR is 44.3dB, SNDR is 41.6dB,SFDR is 54.35 dB, ENOB is 7.1bit.The power dissipation is 234 mW. The whole layout area is 2.36 mm2, and it passed DRC and LVS verification. |
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