Font Size: a A A

Study On Image Stabilization And Observation Methods Based On FPGA

Posted on:2019-09-23Degree:MasterType:Thesis
Country:ChinaCandidate:P D YuFull Text:PDF
GTID:2370330545952263Subject:Integrated circuit engineering
Abstract/Summary:PDF Full Text Request
Solar physics is one of the hot topics in the world.Many achievements have been made in ground observation in China,but there is no original contribution in the field of space solar exploration.Therefore,launching an autonomous solar observation satellite is imminent.The Advanced Space-based Solar Observatory(ASO-S)a class A of the Special Pilot project of Chinese Academy of Sciences is a solar observation satellite that is being developed.This project is the hardware design of the data acquisition and processing system of one of the three loads,the Full disk vector MagnetoGraph(FMG).Currently,the hardware system of the FMG is mainly based on the computer processor.The data acquisition and processing process need two independent modules to complete respectively.However,the processor system based on computer is not suitable for satellite-borne systems with strict power and volume requirements due to its large volume and high power consumption.FPGA has rich logical resources,which can accomplish data acquisition and processing functions in one system.Meanwhile,FPGA has the feature of small volume and low power consumption.Therefore,this thesis chooses FPGA as the main device to design the data acquisition and processing system.In this thesis,the data acquisition and processing system based on FPGA has been achieved,and the prototype of FMG system has been developed.The main tasks include:(1)The XC6SLX45 FPGA and the MT41J128M16-187E DDR3 SDRAM are chose as the main components.The FPGA chip has rich internal logic resources and 5%more resources than Cyclone IV chips.(2)Using the FPGA to control image sensor for data acquisition,images can be collected in real time of 1280x720@30fps.The operation of data gray transformation is completed,and it makes real-time conversion of 720P data.(3)The technology of DDR3 partition alternation storage is achieved.The operation of read-write data alignment,odd and even frame data superposition and acquisition of left-handed and right-handed data are accomplished.The system clock is 84MHz,and DDR3 can work steadily in 312.5MHz,and the data acquisition rate can reach 600Mbit/s.(4)Using Gigabit Ethernet for data redundancy processing,the data can be checked in real time.The module works steadily in 125MHz.In the further research of complex algorithm,DSP is used to process the collected data.After simulation and hardware verification,this hardware system can achieve the demands of the data acquisition and processing for the FMG.
Keywords/Search Tags:FPGA, Data acquisition and processing system, FMG, DDR3 SDRAM
PDF Full Text Request
Related items