Algorithm Optimization And Implementation Of High Applicability Large-scale Matrix Inverter

With the continuous development of technologies such as cloud storage,cloud computing and cloud computing in modern scientific research,related data information has also exploded.Matrix class operations have significant advantages in the storage and calculation of massive data.Matrix inversion is one of the most complex operations.Scholars at home and abroad have proposed many effective matrix inversion algorithms after continuous research and exploration,and have been verified and implemented on different hardware structures.The calculation of the inverse matrix is huge,and the hardware implementation is susceptible to resources.The common matrix inversion is mostly realized by small matrix or special matrix.The research on large-scale arbitrary matrix inversion is less,and it is rare for hardware implementation.Large-scale matrix inversion is considered to be one of the most challenging problems.Therefore,exploring the hardware implementation of large-scale non-singular matrix inversion has important practical significance.In this dissertation,the research on large-scale non-singular matrix inversion algorithm and hardware structure design is carried out for the above problems.The main work is as follows:?1?The typical matrix inversion algorithm,applicability and computational complexity are studied and analyzed.The in-situ replacement inversion algorithm based on LU decomposition is selected.After correcting calculation formula of the in-situ replacement matrix inversion algorithm,an improved large dimension matrix inversion algorithm is proposed.The new algorithm extends the application range to non-singular matrices by principal component exchange and row modification operations,which overcomes the shortcomings of the limited in-place replacement algorithm.?2?According to the computational characteristics of the new algorithm,the hardware design scheme of the large-scale arbitrary-order matrix invertor is proposed.This design continues the advantages of the"in-place replacement"memory structure,and adopts a multi-channel parallel and operator time-multiplexing strategy to improve the operation speed.?3?Complete the hardware implementation and perform functional verification and performance test on the FPGA chip of Xilinx Company.The hardware measurement results show that the design can complete the 128-order non-singular single-precision floating-point matrix inversion task in 332K cycles,and the accuracy is 10^-5.