Design And Physical Implementation Of Neuromorphic Hardware Based On Spiking Time Coding

Neuromorphic computing refers to systems,devices,and models that are inspired by biological brains or artificial neural networks or that use non-von Neumann architectures.Spiking neural networks mimic the mechanisms of biological neurons,enhance the ability to process spatiotemporal information,and due to their event-driven nature,spiking neural networks consume very little power.Researchers attempted to use the software and traditional von Neumann computer to simulate spiking neural networks.The disadvantages are small simulation scale,high energy consumption,and low efficiency.In order to perform spiking neural network operations more efficiently,it is necessary to customize neural network hardware.Due to its low power consumption,massive parallelism,high fault tolerance,and configurable expansion,neuromorphic hardware has great application prospects.A key factor to consider in neuromorphic hardware design is the neuron model.There are many kinds of spiking neural network neuron models,ranging from simple to complex,and biological rationality from low to high.Complex models are closer to biological reality,can simulate more complex neuron behavior,and are more likely to achieve brain-like functions,but complex models need to consume a lot of computing resources,which is not conducive to hardware integration.Considering the accuracy of the model and the difficulty of integration,this paper chooses the LIF pulse neuron model for hardware design.The LIF model is not very similar with biological neuron behavior,but the advantage is that it can generate enough complexity in the spiking neural system while the calculation is simple.It is necessary for integrating large-scale neuron networks.Another key factor to consider in neuromorphic hardware design is the circuit type of hardware implementation.There have been many proposed taxonomies for neuromorphic hardware systems,but most of those taxonomies divide the hardware systems at a high-level into analog,digital or mixed analog/digital implementations.The analog system uses the natural physical characteristics of the electronic device to calculate,which is closer to the behavior of the biological nervous system,but is not stable enough,is susceptible to noise,and is not easy to implement the event-driven characteristics of spiking neural network.Digital systems tend to rely on Boolean logic gates,which are more stable,have small size and low power consumption,and are easy to integrate on a large scale.Considering the requirements of system energy consumption,efficiency and stability,digital application-specific integrated circuits are a good alternatives.This thesis is based on the LIF spiking neuron model,and completes the design of 32x32 spiking neural network process unit in the first spiking time coded style.Based on the SMIC 55 nm process,the semi-customized flattened physical design flow is used to complete the physical design of neural process unit logic synthesis,floorplan,placement,clock tree synthesis,routing,static timing analysis,physical verification,get the required layout,and hand over to the Foundary for tape-out.Chip contains 250 K instances,2M gates,chip area 2.9mmx2.3mm,operating frequency 200 M,pt-based power simulation is about 54 mw.