The Design Of A General Front-end Acquisition System For Particle Physics Experiments

Field programmable gate array(FPGA)is often used in the design of data acquisition system in experimental environment due to its rich resources and reconfigurable advantages.However,in the particle physics experiment environment,due to the ionizing radiation generated by the collision of heavy particles,the circuit working in it is vulnerable to the error caused by the single pa rticle radiation.Therefore,for the readout circuit of particle experiment data,the design of front-end acquisition system with efficient sampling capability,high-speed transmission capability and radiation resistance capability is the research hotspot in the world.In order to design the front-end acquisition system,this paper designs the signal sampling and optical fiber transmission functions of the front-end acquisition system based on SRAM FPGA,and carries out anti-radiation flushing of the error circuit in SRAM FPGA based on Flash FPGA design external refresh circuit,so as to realize a hybrid,compatible performance and reliability of the general front-end data acquisition system.In order to enable the front-end acquisition system to acquire and transmit data at a higher rate,this paper first uses the AD9656 chip with encoding function to realize data acquisition function,and consigns relevant registers to drive the chip to sample the analog signals in the particle experiment in real time,and t hen sends the coded data to the FPGA after being converted into digital signals.Secondly,SRAM FPGA is used to realize data transmission function.In the design,JESD204 B soft core is used to decode ADC data.After FIFO buffering,the output is finally ca rried out through 4.8Gbps fiber link encoded by GBTx error correction protocol.Loopback test results show that the acquisition and transmission circuit designed in this paper can realize the functions of efficient acquisition and high-speed optical fiber transmission,and the system delay is 250 ns,which can meet the requirements of most particle physics experiments.Since SRAM FPGA is vulnerable to single particle radiation,this paper combines the two means of dynamic partial reconfiguration refresh and three-mode redundant reinforcement,and designs anti-radiation refresh circuit based on Flash FPGA for protection.In order to ensure the reliability of the refresh circuit itself,before designing the refresh circuit,the beam experiment was used to verify the radiation resistance of the Flash FPGA,and it was proved that the FPGA could work normally under the radiation condition with the beam line energy no higher than 10 Me V.Then,the system function modules are divided for the three-mode redundant design.The refresh circuit can detect the results of the three-mode voting device,and the target block circuit is configured with part of the bitstream file.This refresh method can not only repair the errors,but also modify the function design of the system online to improve the universality of the system.The test results show that the refresh method designed in this paper can effectively reduce the refresh area and greatly improve the refresh speed compared with the traditional method.