Hardware Optimization Of Two Nonlinear Systems Based On Stochastic Computing

Research on non-linear systems is becoming more and more extensive.Typical non-linear systems,such as chaotic systems,neural networks,etc.,are the current research hotspots.Compared with traditional large-scale integrated circuits,Field Programmable Gate Array(FPGA)have the characteristics of good reconfigurability and high parallelism,and they have become the choice for hardware implementation of non-linear systems.However,FPGA also has the disadvantage of expensive digital signal processor(DSP)resources,and most non-linear systems require a considerable amount of DSP resources in hardware implementation,which hinders the large-scale application of these systems.Stochastic computing is processing the bit stream of data conversion in the form of probability.It can use simple gate circuits to implement addition,subtraction,multiplication,division,and other complex operations,thereby reducing the consumption of computing resources in FPGA and improving the implementation of non-linear systems in FPGA hardware.Time efficiency.Therefore,it is of great significance to conduct research on the optimization and application of non-linear systems based on stochastic computing in FPGAs.Firstly,aiming at the different characteristics of stochastic computing,this paper chooses chaotic systems and tripartite synapses as two typical nonlinear systems.They have optimized them separately.Then,by choosing appropriate chaotic systems,state machines to approximate complex functions,and extended random logic,they not only take advantage of the simple structure of stochastic computing and high utilization of hardware resources,but also avoid the calculation range of stochastic computing.Finally,small and difficult to calculate the shortcomings of complex functions,and then implemented the hardware by stochastic computing.The specific research content is as follows.1.Optimization and application of pseudo-random number generator based on chaotic system.Pseudo-random numbers play an indispensable role in cryptography.In recent years,chaotic systems have been considered as an important source for generating pseudo-random numbers and implementing pseudo-random number generators on hardware has become an important research direction.In this paper,combining chaotic systems with stochastic computing,a pseudo-random number generator(PRNG)is implemented on a FPGA platform.The analysis proves the reliability of the perturbation algorithm.The generated pseudo-random number passed the TestU01 test and the NIST SP 800-22 test.2.Hardware implementation of STBCS based on random calculation.Chaotic systems play an important role in the fields of cryptography and information security.The sine-transformation based chaos system(STBCS)can improve the shortcomings of low complexity and poor chaos performance of classical chaotic systems.This paper implements STBCS on FPGA hardware platform.The performance of the chaotic system and the performance of the generated random numbers are used to verify the performance of the design.Compared with traditional design,the final consumption of hardware resources in this paper is greatly reduced.3.Hardware implementation of tripartite synapses based on stochastic computing.The tripartite synapses are a collective term for the interaction of astrocytes,neurons,and synapses.It has the ability to repair itself in a pulsed neural network.Due to the complexity of the tripartite synapses model,the efficiency and scalability of its hardware structure has become a research challenge.This paper proposes an efficient hardware tripartite synaptic structure based on stochastic computing technology.In hardware devices,random computing is used to replace traditional computing components such as DSP.In the calculation process,extended stochastic logic is used to expand the data range.The results show that the proposed hardware architecture has the same output characteristics as software simulation,and has lower hardware resource consumption scalability of network hardware systems.