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Ab Initio Quantum Transport Simulations Of 2D WSe2 And Phosphorene

Posted on:2020-08-29Degree:MasterType:Thesis
Country:ChinaCandidate:Q H LiFull Text:PDF
GTID:2381330575956617Subject:Physics
Abstract/Summary:PDF Full Text Request
In the post-silicon era,two-dimensional(2D)semiconductors,e.g.transition metal dichalcogenides(TMDs)and phosphorene possess excellent electronic structure and properties,being a competitive candidate in nanoelectronics.Formation of Ohmic contact is crucial for achieving high device performance in 2D materials based transistors.Moreover,by studying the electrode contact of sub-10 nm WSe2 field effect transistors(FETs)and the device performance of sub-5 nm monolayer(ML)phosphorene metal-oxide-semiconductor FETs(MOSFETs),this paper theoretically explored the application of 2D semiconductors in ultrascaled electronic devices in terms of interface and upper limit performance.(1)By using ab initio electronic structure calculations and quantum transport simulations,we reveal the great potential of 2D titanium carbides as the electrode materials for monolayer(ML)WSe2 device.In the vertical direction,both tunnel barrier and Schottky barrier are absent in all the three hybrid heterostructures of ML WSe2/Ti2C and ML WSe2/Ti2CY2(Y = F and OH),implying a high vertical carrier injection efficiency.In the lateral direction,although pristine Ti2C and ML WSe2 form a Schottky contact with electron barrier of 0.40 eV,Ti2CF2/ML WSe2 and Ti2C(OH)2/ML WSe2]form p-type quasi-Ohmic and n-type Ohmic contacts,respectively.Therefore,2D titanium carbides can be promising candidates as electrode materials for the ML WSe2 transistors by proper controlling of the surface functional group.(2)We simulate sub-5 nm monolayer(ML)phosphorene MOSFETs for the first time by using ab initio quantum transport simulations.We predict that the ON-current,delay time,and power dissipation indicator of the sub-5 nm double-gated ML phosphorene MOSFETs with proper under-lap structure can fulfill the requirements of the international technology roadmap for semiconductors(ITRS)for both the high performance(along both the armchair-and zigzag-directions)and low power(along the zigzag-direction)devices in 2028 until Lg is scaled down to 2 nm.Therefore,phosphorene is more suitable for ultra-scaled FETs than 2D MOS2 in the post-silicon era as far as the ON-current is concerned.
Keywords/Search Tags:monolayer phosphorene, ab initio calculation, quantum transport simulations, ohmic contacts, WSe2
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