Research On Topology And Digital Control Strategy Of Interleaved Boost PFC

Boost topology is widely used in power factor correction(PFC)circuits because of its simple structure and low cost.The use of multi-channel Boost structure staggered parallel operation can reduce the input current ripple and the EMI filter size,and improve power density.Power factor correction with digital controller can achieve a greater adaptability and flexibility compared to which with analog controller.In this dissertation,several problems in the digitization of interleaved Boost PFC are studied.In this dissertation,the circuit characteristics of interleaved Boost PFC in continuous current mode are analyzed theoretically.The working mode of the staggered parallel Boost PFC is analyzed and modeled,and a small signal model is established.The loop parameters of the interleaved parallel Boost PFC under the traditional control strategy are set,and that the input current of the PFC under traditional control strategy will be advanced to the input voltage is pointed out.The inner current loop control strategy based on duty cycle feedforward control is proposed.The improvement mechanism to the performance under double closed-loop PI controller is analyzed theoretically,and the simulation research is done.According to the previous theoretical analysis,this dissertation designs a interleaved Boost PFC with peak power of 2000 W which is controlled by DSP.The design method of the main circuit parameters,the design principle of the digital sampling circuit and the structure of the DSP control program are given.And the experimental comparison and result analysis were carried out by using double closed-loop PI controller and PI controller plus duty ratio feedforward respectivelyThe effects of parasitic parameters on the sampling of digital controllers at high switching frequency and low duty ratio are studied,and the mechanisms of several solutions are analyzed.Then the influence of parasitic parameters on MOSFET driving is analyzed,and the solution to minimize the driving circuit is given.The drive voltage experimental waveforms demonstrate the correctness of the drive circuit minimization.Finally,the dissertation studies the control strategy of PFC when the grid is distorted,and proposes a method of extracting the fundamental wave of the grid voltage based on Second-Order Generalized Integrator Frequency-Locked Loop.The theoretical analysis and simulation are carried out.The simulation results show that the control strategy can keep the input current sinusoidal under the amplitude distortion and frequency variation of the grid voltage,and the phase of the input current is consistent with the fundamental voltage of the grid voltage.