Analysis And Design Of High Efficiency Gate Driver Suitable For BUCK Converter

With the contimuously development of portable electronic devices,DC-DC converter has become increasingly important as their mainstream power supply chips.BUCK converter is one of the most widely used architecture in DC-DC converters.The problem of system conversion efficiency has been a hot topic in academic research.There are various factors affecting the conversion efficiency of the BUCK converter.The loss caused by the non-optimal dead-time setting is especially serious in the influence of various losses on the system conversion efficiency,especially under high frequency or low voltage application conditions.In order to effectively reduce this loss,this paper proposes two gate driver circuits based on two mainstream dead-time control method respectively,which have distinct merits in dead-time control performance.Due to the obvious defects of the fixed dead-time control method,adaptive dead-time control method was proposed.Due to its simple control principle and high robustness,this technique is widely used in the design of gate driver circuits for BUCK converters.In this context,this paper proposes an adaptive dead-time control method based on the miller plateau theory.Thereby,the advantages of adaptive dead-time control method,e.g.,simple implementation circuits and robustness,are enhanced.Futhermore,the bootstrap circuit and driver chain circuit are spcifically designed.The fabricated driver circuit occupies an area of 0.545 mm~2.Experimental result shows that the dead-time is regulated to around 20 ns over variable load conditions and input voltages.Since the adaptive dead-time control method can not eliminate the dead-time caused by the inherent delay of gate driver circuit,a novel dead-time control method,e.g.,predictive dead-time control method is proposed in recent years.The core idea of the proposed predictive control method in this paper is to use the dead-time information detected in this cycle to control the dead-time of the next cycle.Thereby,the real-time detection and control are avoided.And the utilization of dead-time information is obviously improved.Based on the existing predictive dead-time control technique,the detection circuit and unit delay generator circuit are specifically designed for the purpose of optimization.The fabricated driver circuit occupies an area of 0.545 mm~2.Experimental result show precisely controlled dead-time,which is approximately zero,over variable load conditions and input voltages.The design of the proposed gate driver in this paper is completed under the support of the theoretical basis of the driver circuit design,including the knowledge of power MOSFET devices,the switching transversion of BUCK converter,the loss analysis of synchronous BUCK converter and crosstalk analysis.All the circuits designed in this paper is completed using a 0.35μm BCD technology.After the simulation of subcircuits are completed,the system is combined with the BUCK converter power stage for the further verification.Peak efficiency of 94.95%and 96.5%can be achieved by adapting the proposed gate drivers respectively,which is simulated with the same BUCK convertor.The two gate drivers using different control method are inserted into the BUCK converter chip and fabricated.The test work is completed,which further verifies the circuit feasibility.