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Research On Formal Analysis And Fault Diagnosis Method Of Temporary Speed Restriction Of Train Control System

Posted on:2021-04-14Degree:MasterType:Thesis
Country:ChinaCandidate:L SongFull Text:PDF
GTID:2392330605461007Subject:Transportation engineering
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TSRS(temporary speed restriction system)is one of important components of the train control system.It is a safety critical system based on "fault-safety",which plays an important role in the safe operation of the train.Due to the complexity and diversity of China's railway,the temporary speed restriction system is required to be applicable to both CTCS-2 and CTCS-3.Therefore,different hardware and software are required to participate in the speed restriction process,so that the speed restriction information among the subsystems can interact safely and instantly,which also reflects the complexity of the temporary speed restriction system.The temporary speed restriction order is a scheduling order with clearance,that is to say,its effective time is only within a certain time,which means that the temporary speed restriction system has its hidden defects,which are very harmful to safe driving.It is required that the temporary speed restriction system can be applied in both CTCS-2 and CTCS-3.Therefore,different hardware and software are required to participate in the speed restriction process,which reflects the complexity of the temporary speed limit system.The temporary speed limit order is a scheduling order with clearance,and its effective time is only in a certain time,which means that the temporary speed restriction system has its hidden defects,which is very harmful to safe driving.In view of the hidden gap in the transmission of temporary speed restriction command,through the analysis of the interaction process of temporary speed restriction information,the formal method modeling research on the characteristics and behavior of the system is carried out to verify the logical correctness and real-time of the system,so as to find out the ambiguity and fuzziness of the system specification,provide reference for the subsequent improvement of the system specification,and help to improve the safety of the early design of the system Sex.However,the temporary speed limit system itself is a complex system which needs multi structure and multi equipment to participate in.The information interaction is frequent and the real-time requirement is high.If the equipment fails or the information interaction is delayed or wrong,the speed restriction order will be invalid.Therefore,analyzing the information interaction fault in the temporary speed restriction system and using the appropriate method to diagnose the fault will help to improve the efficiency of the system maintenance in the later period.Firstly,this thesis analyzes the structure of the temporary speed restriction system and the operation process of the speed restriction command,and obtains the information interaction relationship between the devices.Secondly,based on the technical specifications of the temporary speed restriction and the theory of timed automata,combined with the structure of the temporary speed restriction system,it extracts its function and performanceconstraints,and uses the UPPAAL tool to model and simulate the information interaction behavior in the system.Finally,based on the work flow of the temporary speed restriction system and graph theory,the status of the equipment in the system is diagnosed.The equipment involved in the operation of the system is simplified as abstract nodes.The information interaction between the equipment is compared to test information,diagnosis system modeling,testing invalid model and designing diagnosis algorithm.The state of each equipment in the system is identified through clear and orderly diagnosis process.Finally,verify the algorithm.The verification results show that the method can accurately judge the status of the equipment in the system,and provide a new diagnosis method for the fault research of temporary speed restriction system.
Keywords/Search Tags:Temporary Speed Restriction, Timed Automata, Formal Analysis, Graph Theory, Fault Diagnosis
PDF Full Text Request
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