Design And Implementation Of Lossless Data Compression IP

In recent years,the process of exploring the mysteries of space has been accelerated.With the increasing requirements of space science missions and the continuous development of the spaceborne equipment and technology,the exploring tasks are becoming more and more diversified,and the amount of the data acquired from explorer is obviously increasing,leading to huge pressure casting on the raw signal processing methods such as transmission,storage and processing.Lossless data compression technology has become one of the important research topics in space science.The main work and achievements of the study in this thesis can be divided into the following three points.(1)The developments and research status of lossless compression algorithm are investigated,and the advantages and disadvantages of lossless data compression algorithm commonly used in space science missions are analyzed and compared,and the existing problems in the research status of universal lossless data compression technology are summarized.Among the universal lossless data compression algorithm,the algorithm based on RICE code proposed by CCSDS(The Consultative Committee for Space Data Systems),whose compression ratio is between 1.6 and 3.0,has simple structure and is friendly for hardware implementation.(2)A universal lossless data compression algorithm for space science data is designed and proposed,which is composed of linear first-order unit-time delay prediction and hybrid entropy coding.The former takes advantage of the time correlation to eliminate redundant data,making the raw data into prediction error with lower information entropy.The prediction method has low computing complexity and is friendly for hardware implementation in spaceborne equipment.The latter makes full use of the sparsity of prediction error distribution and the redundancy of data coding,and innovatively proposes to divide the data into two different coding modes: highentropy coding and low-entropy coding,which further improves the compression efficiency.Test results on several different data sets show that the compression ratio of the proposed algorithm ranges from 2.3 to 5.5.The performance of the proposed algorithm is better than that of RICE algorithm,and the average compression ratio is improved by 23%.(3)The algorithm is implemented on the FPGA platform by means of Verilog language.The algorithm structure is adjusted to adapt to the hardware platform,and an innovational storing structure of the code table is proposed.The operating frequency is improved and the storage space is reduced.The hardware design passes functional simulation and static timing analysis,and the allowable maximum operating frequency of the lossless data compression system is 44.835 Mhz.