Design And Implementation Of Stochastic Timing Pulse Controller For UWB Fuze

In the ultra wideband(UWB)radio fuze,the transceived timing signals determine the frequency characteristics of the UWB narrow pulse and the sampling pulse.And that the periodic pulse signal may be intercepted causes its anti-jamming performance degradation.Aimed at that problem,this paper has designed an ultra-wideband fuse stochastic pulse controller based on FPGA,which improves the anti-jamming of UWB.Firstly,according to the principle of pulse position modulation,the modulation algorithm has been designed.The 5PPM modulation mode is selected to improve the antijamming of the UWB system after the correlation simulation.And the paper has designed and fabricated stochastic timing pulse controller based on EP2C5T144C8 N FPGA,including schematic designs of the power circuit,the clock circuit,the external memory module and the external configuration module,built hardware platform used for stochastic pulse generation algorithm implemented.Then the stochastic pulse generation algorithm has been designed and programmed on the hardware platform.The design ideas and flow charts of PLL multiplication algorithm,stochastic number generation algorithm,delay control algorithm and timing pulse generation algorithm are given.Finally,complete debugging,simulation and testing of UWB fuze stochastic timing pulse controller.The test results show that,the UWB fuze stochastic timing pulse controller can produce stable 4-channel 5PPM timing pulse signal simultaneously.The average pulse width is 19.58 ns,the maximum error is 0.31 ns,the mean square error is 0.144 ns,and its pulse period follows Gaussian distribution.The average delay time of the last 3 pulses is 19.8 ns,39.8 ns and 59.9 ns.This design satisfy meet UWB fuze stochastic pulse control requirements.