Research And Design Of 40GSPS Broadband Oscilloscope Analog Channel

This thesis takes broadband analog channels and high-speed TIADC drive circuits as research topics,and discusses the use of discrete devices to build 6GHz bandwidth signal conditioning circuits and flexible and controllable drive circuits that simultaneously drive eight ADCs when no integrated chip is available..By studying the characteristics of functional modules such as impedance conversion circuit,variable gain circuit,trigger circuit and ADC drive circuit,combined with simulation analysis,circuit debugging and program optimization,the actual performance of the analog front end is improved.The details are as follows:(1)In-depth study of the structure of the impedance conversion circuit of the high and low frequency separation path,and the effect of quiescent current on the bandwidth of the impedance conversion circuit is analyzed.An innovative structure with a feedback loop that can stabilize the static operating point is designed.Simulated verification and physical debugging of the impedance conversion circuit built by discrete devices were performed to overcome the influence of parasitic parameters,and an impedance conversion circuit with a bandwidth of 6 GHz was realized.(2)According to the demand of variable gain amplifier circuit,a variable gain circuit structure based on fixed gain amplifier and numerical control attenuator is designed,and its characteristics are studied.(3)Combined with the working principle of the trigger circuit,a special trigger level adjustment circuit is designed to realize the comparison between the differential signal and the trigger level without gain loss.The principle design of the hysteresis voltage regulation circuit is designed to realize the function of adjustable trigger sensitivity program control.(4)Analyze the functional requirements of the TIADC driving circuit and the defects of the traditional step-by-step fan-out scheme.The research and design of a driving circuit scheme that can flexibly select the sampling channel and simultaneously drive eight ADCs.The signal selection,shunt output,and gain compensation are achieved by using discrete devices such as radio frequency selection switches,power splitters,and fully differential amplifiers.(5)The effects of isolation and equivalent input impedance on the frequency response consistency of the drive circuit are studied,and optimization measures are proposed to make the frequency response difference between multiple outputs less than 1dB.The gain calculation relationship of the differential amplifier is derived,and the frequency response equalization is adjusted by adjusting the resistance-capacitance network at the amplifier input to optimize the in-band gain flatness.Finally,through reasonable device selection and debugging optimization,a discrete device is used to realize the design of a high-bandwidth signal conditioning channel and a drive circuit that can be flexibly configured according to the sampling rate.Test and verify the key performance indicators of the analog channel.The driving circuit and signal conditioning channel-3dB bandwidth reaches 6GHz,which meets the expected design requirements.