Reliability Design For Digital Circuit Working At Minimum Energy Point

Some applications for energy-sensitive but not requirement for high performance can lower its energy through lower its working voltage to minimum energy point But in low voltage region,the reliability of the circuit will decrease due to the process variation and temperature variation.Based on the existing problems,this thesis focuses on the minimum energy optimization of circuit reliability.Firstly,through reliability analysis based on the minimum energy point,the threshold voltage variation and the noise margin for cells are the most significant parameters for design in near/subthreshold region.A VT balancer based on the minimum energy point is designed to reduce the impact of VT variations in this thesis.The results show that the minimum voltage for the inverter decreases 74mV and the standard deviation of delay characteristic has reduced by 3.1 times through Monte Carlo simulations.The parameter?/? also reduced by 2.4 times.Secondly,a standard cell library based on the minimum energy point is designed in this thesis,which avoids some structure may be sensitive for process variation.The size of the cell library is adjusted based on the minimum working voltage.the new library is validated through simulation for the ISCAS benchmarks.The results show that the performance is improved by 28 percent and the energy is reduced by 18.1 percentFinally,the JPEG encoder circuit is designed by minimum energy point methodology in the thesis.Based on the minimum energy point,the reliability of the circuit is optimized.After reliability design,the results show that the performance of the circuit is improved by 42 percent and the average energy is reduced by 13.1 percent.