JND Algorithm Adjustment Of Image Watermarking And Implement By Circuit

Digital image watermarking plays an important role in digital images,audios,videos copyright protection.The digital watermarking algorithm based on the wavelet domain is combined with the human visual system,making the wavelet coefficient's change are more consistent with the human visual system,it is widely used since it can both guarantee robust watermark and keeps a good quality of the watermarked images.Just noticeable distortion(JND)is a calculation method based on the human visual system to calculate the redundancy of human eye at each pixel,so as to get the largest variable corresponding to each pixel.But since its calculation is seriously complex,it is mainly complement by computer not by hardware circuits.In this paper,we use MATLAB and other tools to simulate the algorithm of JND based on the wavelet domain,according to the theory of human visual characteristics,combining the pixel masking model,the texture masking factor in the original JND is replaced by the method of physical meaning approximation.At last,a new JND algorithm suitable for the implementation of the hardware description language is obtained by replacing the partial product of JND with linear relation.The obtained JND results are used as quantization errors,and the discrete wavelet coefficients are changed to obtain images with encrypted information.The algorithm of this paper is simulated and analyzed,he robustness of JPEG compression,noise attack and low-pass filtering and other image processing the image detection of the watermark image;in the visual quality under the same condition,comparison of two algorithms to embed the watermark and the original image PSNR,the ability to obtain JND model error tolerance.Experiment results prove that the images have lower PSNR and tolerate more distortion,keep balance between invisibility and robustness.In order to verify the time required by the algorithm is less than the original algorithm,the computational complexity makes the digital watermarking technology can be more easily applied in integrated circuits and embedded devices.To prove the function of this algorithm,the hardware description language Verilog is used to model the algorithm,and the Qsys system based on FPGA is built.An Altera EP2C35F672C6 FPGA is used for the experiments.The data processed by the JND hardware circuit are imported into MATLAB,and the watermark image obtained and the watermark image which is not processed by the hardware PSNR is47.56 d B.The watermark image conforms to the quality requirements of the image.The complexity is low,and it is easy to be realized by circuit.