Hardware Trojan Detection Method Based On Region Segmentation And Self-Test Vector Generation Technology

Today,with the rapid development of science and technology,integrated circuit products go deep into all aspects of life and work.The emergence of hardware Trojans poses a major threat to information security.In order to effectively prevent the hardware Trojan invasion,research on hardware Trojans has gradually become a trend.Among various detection technologies of hardware Trojans,the side-channel detection technology is widely used due to its non-destructive and batch detectable characteristics.However,the side-channel detection is inevitably affected by manufacturing process error and measurement and environmental noise of the integrated circuit,resulting in hardware Trojan detection failure or resolution degradation.Based on the previous research,this paper proposes a hardware Trojan detection method based on region segmentation.The principle of the technology was described and deduced.This paper introduces the method of regional segmentation design,which is used to combine the regional segmentation design with hardware Trojan detection.The area gate unit was studied and designed,and the hardware Trojan circuit used was designed and simulated.Under the condition of different power supply voltage,ambient temperature and process size,the regional segmentation technology was simulated.It is proved that the detection resolution of hardware Trojan after segmentation is much higher than that of undivided segmentation.Finally,the detection of the hardware Trojan was completed using the area segmentation technology.When the detection of the Trojan in the entire region failed,a hardware Trojan with a magnitude of 10-3 was detected in the subregion with a resolution of 7.12%,which proves that region segmentation is strongly effective.This article also introduces and proves the concept and principle of self-test sequence optimization code.A self-test sequence optimization code generator was designed and simulated as well as implemented by FPGA.The optimal self-test vector generator that can be used for hardware Trojan detection was built,and the functional simulation was completed and verified in the reference circuit.Finally,the optimal self-test vector generator was implanted into the target Physical Coding Sub-layer(PCS)circuit to detect the hardware Trojan.Under the condition of region segmentation,the use of an optimal self-test vector generator increases the Trojan resolution from 7.12% to 8.55%,which greatly improves the resolution of hardware Trojan detection.In addition,the background technology of the physical coding sub-layer circuit was studied,and the specific structure and function of the physical layer and the PCS circuit were analyzed.The basic principles of COM symbol lock,pseudo-random code detection and CRC check have been studied.The codec unit and the buffer unit were designed and simulated.The design of the target circuit for area segmentation was completed.