Study On JFET Effect Of VDMOS

Vertical Double Diffused Metal-Oxide-Semiconductor-Field Effect Transistor is referred to as VDMOSFET.VDMOS is a research hotspot due to its stable operation,large dynamic range,fast switching speed,good frequency characteristics and low power consumption.In this paper,breakdown voltage and specific on-resistance of VDMOS are studied basing on the analysis of VDMOS working principle.The systematical research is concentrated on the JFET effect in VDMOS,especially on the influence of JFET on breakdown voltage mechanism and on-state characteristics of the device.The FOM(Figure-Of-Merit)is used to evaluate the trade-off relationship between breakdown voltage and on-resistance of the device.The two-dimensional device simulation software MEDICI is utilized to optimize key parameters of the device.This paper firstly analyzes the working mechanism of the conventional VDMOS device.In the off-state,the breakdown voltage is simulated to deepen the understanding of breakdown mechanism of the device.The conduction characteristics of the device are studied according to the transfer characteristic curve and the output characteristic curve.Particularly,the on-state and blocking characteristics in JFET region of the conventional VDMOS device are studied.On this basis,Chapter 4 proposes a VDMOS device structure with highly doped JFET regions.This structure reduces the JFET effect of the device by highly doping the JFET region in the device.The simulated results show that VDMOS with highly JFET region doping improves the performance of breakdown voltage and on-resistance in comparison with the conventional VDMOS device,especially the enhancement in on-resistance.